K40P81M100SF2_11 Datasheet, PDF (37/63 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Peripheral operating requirements and behaviors
Table 26. 16-bit ADC with PGA characteristics (continued)
Symbol
G
Description
Gain⁴
Conditions
• PGAG=0
• PGAG=1
• PGAG=2
• PGAG=3
• PGAG=4
• PGAG=5
• PGAG=6
Min.
Typ.¹
Max.
Unit
Notes
TBD
0.98
TBD
TBD
1.99
TBD
R_AS < 100Ω
TBD
3.97
TBD
TBD
7.95
TBD
TBD
15.8
TBD
TBD
31.4
TBD
TBD
61.2
TBD
BW
PSRR
Input signal
bandwidth
Power supply
rejection ration
CMRR Common mode
rejection ratio
V_OFS
T_GSW
dG/dT
Input offset
voltage
Gain switching
settling time
Gain drift over
temperature
dV_OFS/dT Offset drift over
temperature
dG/dV_DDA Gain drift over
supply voltage
E_IL
Input leakage
error
V_PP,DIFF
Maximum
differential input
signal swing
SNR
Signal-to-noise
ratio
• 16-bit modes
• < 16-bit modes
Gain=1
• Gain=1
• Gain=64
• Gain=1
• Gain=64
Gain=1
• Gain=1
• Gain=64
All modes
—
—
TBD
TBD
TBD
—
—
—
—
TBD
TBD
TBD
0.2
—
4
40
—
—
—
TBD
10
kHz
kHz
dB
V_DDA= 3V
±100mV,
f_VDDA= 50Hz,
60Hz
dB
V_CM=
dB
500mVpp,
f_VCM= 50Hz,
100Hz
mV
Gain=1, ADC
Averaging=32
µs
5
—
TBD
TBD ppm/°C 0 to 50°C
—
TBD
TBD ppm/°C
—
TBD
TBD ppm/°C 0 to 50°C, ADC
Averaging=32
—
TBD
TBD
%/V V_DDA from 1.71
—
TBD
TBD
%/V
to 3.6V
I_In × R_AS
mV
I_In = leakage
current
(refer to the
MCU's voltage
and current
operating
ratings)
V
6
• Gain=1
• Gain=64
where V_X = V_REFPGA × 0.583
TBD
83.0
—
dB
TBD
57.5
—
dB
Table continues on the next page...
16-bit
differential
mode,
Average=32
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
37