K40P81M100SF2_11 Datasheet, PDF (32/63 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Peripheral operating requirements and behaviors
The ADCx_DP2 and ADCx_DM2 ADC inputs are used as the PGA inputs and are not
direct device pins. Accuracy specifications for these pins are defined in Table 25 and
Table 26.
All other ADC channels meet the 13-bit differential/12-bit single-ended accuracy
specifications.
6.6.1.1 16-bit ADC operating conditions
Table 23. 16-bit ADC operating conditions
Symbol
V_DDA
ΔV_DDA
Description
Supply voltage
Supply voltage
ΔV_SSA Ground voltage
V_REFH
V_REFL
V_ADIN
C_ADIN
ADC reference
voltage high
Reference
voltage low
Input voltage
Input
capacitance
Conditions
Absolute
Delta to V_DD (V_DD-
V_DDA)
Delta to V_SS (V_SS-
V_SSA)
• 16 bit modes
• 8/10/12 bit
modes
Min.
1.71
-100
-100
1.13
V_SSA
V_REFL
—
—
Typ.¹
—
0
0
V_DDA
V_SSA
—
8
4
Max.
3.6
+100
+100
V_DDA
V_SSA
V_REFH
10
5
Unit
V
mV
mV
V
V
V
pF
R_ADIN
R_AS
Input resistance
Analog source
resistance
13/12 bit modes
f_ADCK < 4MHz
—
2
5
kΩ
—
—
5
kΩ
f_ADCK
f_ADCK
C_rate
ADC conversion ≤13 bit modes
clock frequency
1.0
—
ADC conversion 16 bit modes
clock frequency
2.0
—
ADC conversion ≤13
rate
bit modes
18.484
—
No ADC hardware
averaging
Continuous
conversions enabled
Peripheral clock =
50MHz
Table continues on the next page...
18.0
12.0
818.330
MHz
MHz
Ksps
Notes
2
2
3
4
5
6
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
32
Preliminary
Freescale Semiconductor, Inc.