K40P81M100SF2_11 Datasheet, PDF (34/63 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Peripheral operating requirements and behaviors
6.6.1.2 16-bit ADC electrical characteristics
Table 24. 16-bit ADC characteristics (V_REFH = V_DDA, V_REFL = V_SSA)
Symbol
I_DDA
f_ADACK
Description
Supply current
ADC
asynchronous
clock source
Conditions¹
• ADLPC=1, ADHSC=0
• ADLPC=1, ADHSC=1
• ADLPC=0, ADHSC=0
• ADLPC=0, ADHSC=1
Min.
0.215
—
—
—
—
Typ.²
—
2.4
4.0
5.2
6.2
Max.
1.7
—
—
—
—
Unit
mA
MHz
MHz
MHz
MHz
Notes
3
t_ADACK = 1/
f_ADACK
TUE
DNL
INL
E_FS
E_Q
Sample Time
See Reference Manual chapter for sample times
Conversion Time The ADC calculator tool can be used to determine ADC conversion times for different ADC
configurations: http://cache.freescale.com/files/soft_dev_tools/software/app_software/
converters/ADC_CALCULATOR_CNV.zip?fpsp=1
Total unadjusted
error
• ≤13 bit modes
• <12 bit modes
±0.8
±TBD
LSB⁴
ADC
±0.5
±1
conversion
clock
<12MHz,
Max
hardware
averaging
(AVGE =
%1, AVGS
= %11)
Differential non-
linearity
• ≤13 bit modes
• <12 bit modes
±0.7
±TBD
LSB⁴
ADC
±0.2
±0.5
conversion
clock
<12MHz,
Max
hardware
averaging
(AVGE =
%1, AVGS
= %11)
Integral non-
linearity
• ≤13 bit modes
• <12 bit modes
—
±1.0
±TBD
LSB⁴
Max
—
±0.5
±TBD
averaging
Full-scale error
• ≤13 bit modes
• <12 bit modes
—
±0.4
±TBD
LSB⁴
V_ADIN =
—
±1.0
±TBD
V_DDA
Quantization
error
• 16 bit modes
• ≤13 bit modes
—
-1 to 0
—
LSB⁴
—
—
±0.5
Table continues on the next page...
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
34
Preliminary
Freescale Semiconductor, Inc.