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K40P81M100SF2_11 Datasheet, PDF (35/63 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz
Peripheral operating requirements and behaviors
Table 24. 16-bit ADC characteristics (VREFH = VDDA, VREFL = VSSA) (continued)
Symbol
ENOB
Description
Conditions1
Effective number 16 bit differential mode
of bits
• Avg=32
• Avg=1
Min.
TBD
TBD
Typ.2
13.6
13.2
Max.
TBD
TBD
Unit
Notes
5
bits
bits
16 bit single-ended mode
• Avg=32
• Avg=1
SINAD
THD
SFDR
EIL
Signal-to-noise
plus distortion
Total harmonic
distortion
Spurious free
dynamic range
Input leakage
error
See ENOB
16 bit differential mode
• Avg=32
16 bit single-ended mode
• Avg=32
16 bit differential mode
• Avg=32
16 bit single-ended mode
• Avg=32
Temp sensor
slope
• –40°C to 25°C
• 25°C to 105°C
TBD
TBD
TBD
TBD
TBD
TBD
6.02 × ENOB + 1.76
—
-94
TBD
—
TBD
TBD
TBD
95
—
TBD
TBD
—
IIn × RAS
—
TBD
—
—
TBD
—
bits
bits
dB
5
dB
dB
5
dB
dB
mV
mV/°C
mV/°C
IIn =
leakage
current
(refer to
the MCU's
voltage
and
current
operating
ratings)
VTEMP25 Temp sensor
voltage
25°C
—
TBD
—
mV
1. All accuracy numbers assume the ADC is calibrated with VREFH = VDDA
2. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 2.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
3. The ADC supply current depends on the ADC conversion clock speed, conversion rate and the ADLPC bit (low power).
For lowest power operation the ADLPC bit should be set, the HSC bit should be clear with 1MHz ADC conversion clock
speed.
4. 1 LSB = (VREFH - VREFL)/2N
5. Input data is 1 kHz sine wave.
FIGURE TBD
Figure 11. Typical TUE vs. ADC conversion rate 12-bit single-ended mode
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
35