XRT83L30 Datasheet, PDF (66/78 Pages) Exar Corporation – SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L30
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ONE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.0
PRELIMINARY
TABLE 35: MICROPROCESSOR REGISTER #17 BIT DESCRIPTION
D3
MCLKRATE Master Clock Rate Select: The state of this bit programs the
R/W
0
Master Clock Synthesizer to generate the T1/J1 or E1 clock. The
Master Clock Synthesizer will generate the E1 clock when
MCLKRATE = “0”, and the T1/J1 clock when MCLKRATE = “1”.
D2
RXMUTE Receive Output Mute: Writing a "1" to this bit, mutes receive
R/W
0
outputs at RPOS/RDATA and RNEG/LCV pins to a "0" state.
NOTE: RCLK is not muted.
D1
EXLOS Extended LOS: Writing a "1" to this bit extends the number of
R/W
0
zeros at the receive input before RLOS is declared to 4096 bits.
Writing a "0" reverts to the normal mode (175+75 bits for T1 and
32 bits for E1).
D0
ICT
In-Circuit-Testing: Writing a "1" to this bit configures all the out- R/W
0
put pins of the chip in "High" impedance mode for In-Circuit-Test-
ing. Setting ICT bit to “1” is equivalent to connecting the
Hardware ICT pin to ground.
REGISTER ADDRESS
10010
BIT #
D7
TABLE 36: MICROPROCESSOR REGISTER #18 BIT DESCRIPTION
NAME
FUNCTION
REGISTER
TYPE
RESET
VALUE
GAUGE1 Wire Gauge Selector Bit 1
R/W
0
This bit along with bit D6 are used to select wire gauge size as
shown in the table below.
GAUGE1 GAUGE0
Wire Size
0
0
22 and 24 Gauge
0
1
22 Gauge
1
0
24 Gauge
1
1
26 Gauge
D6
GAUGE0 Wire Gauge Selector Bit 0
See bit D7.
R/W
0
D5
TXONCNTL Transmit On Control.
R/W
0
In Host mode, setting this bit to “1” transfers the control of the
Transmit On/Off function to the TXON Hardware control pin.
NOTE: This provides a faster On/Off capability for redundancy
application.
D4
TERCNTL Termination Control:
R/W
0
In Host mode, setting this bit to “1” transfers the control of the
RXTSEL to the RXTSEL Hardware control pin.
NOTE: This provides a faster On/Off capability for redundancy
application.
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