XRT83L30 Datasheet, PDF (52/78 Pages) Exar Corporation – SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L30
áç
ONE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.0
PRELIMINARY
TABLE 20: MICROPROCESSOR REGISTER #2 BIT DESCRIPTION
D4
TXTEST0 Transmit Test Pattern bit 0: See description of bit D6 for the
R/W
0
function of this bit.
D3
TXON Transmitter ON: Writing a "1" into this bit location turns on the
R/W
0
Transmit Section. A ‘0’ in this bit location, shuts off the transmit-
ter. In this mode the TTIP and TRING driver outputs will be tri-
stated for power reduction or redundancy applications.
D2
LOOP2 Loop-Back control bit 2: This bit together with the LOOP1 and R/W
0
LOOP0 bits control the Loop-Back modes of the chip according
to the following table:
LOOP2
0
1
1
1
1
LOOP1
X
0
0
1
1
LOOP0 Loop-Back Mode
X
No Loop-Back
0
Dual Loop-Back
1
Analog Loop-Back
0
Remote Loop-Back
1
Digital Loop-Back
D1
LOOP1 Loop-Back control bit 1: See description of bit D2 for the func- R/W
0
tion of this bit.
D0
LOOP0 Loop-Back control bit 0: See description of bit D2 for the func- R/W
0
tion of this bit.
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