XRT83L30 Datasheet, PDF (44/78 Pages) Exar Corporation – SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L30
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ONE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.0
PRELIMINARY
HOST MODE SERIAL INTERFACE OPERATION
XRT83L30 has a simple four wire Serial Interface that is compatible with many of the microcontrollers available
in the market. The Host mode operation is enabled by connecting pin 20 (HW/HOST) to a “Low”. The Serial
Interface provides a total of 32 “Read/Write” 8-bit registers that consists of the following signals:
CS -
Chip Select (Active "Low")
SCLK -
Serial Clock
SDI -
Serial Data Input
SDO -
Serial Data Output
USING THE MICROPROCESSOR SERIAL INTERFACE
The following instructions for using the Microprocessor Serial Interface are best understood by referring to the
diagram in Figure 25.
In order to use the Serial interface, a clock signal must be applied to the SCLK input pin. The maximum SCLK
clock frequency is 20MHz. A Read or Write operation can then be initiated by asserting the active-low Chip
Select (CS) input pin. For proper operation the CS must be asserted “Low” at least 50ns prior to the first rising
edge of the SCLK. Once the CS pin has been asserted, the Read/Write Operation and the target register can
be specified through the Serial Interface by writing eight serial bits into the SDI input. Each bit will be clocked
on the rising edge of SCLK.The function of the eight bits are identified and described below:
Bit 1: R/W (Read/Write) Bit
This bit is clocked into the SDI input on the first rising edge of the SCLK after CS has been asserted. This bit
indicates whether the current operation is a “Read” or a “Write”. A “1” in this bit specifies a Read operation,
whereas a “0” specifies a “Write” operation.
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