XRT83L30 Datasheet, PDF (48/78 Pages) Exar Corporation – SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L30
áç
ONE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.0
PRELIMINARY
TABLE 18: MICROPROCESSOR REGISTER #0 BIT DESCRIPTION
REGISTER ADDRESS
00000
BIT #
NAME
FUNCTION
REGISTER RESET
TYPE VALUE
D7
Reserved
R/W
0
D6
Reserved
R/W
0
D5
Reserved
R/W
0
D4
EQC4 Equalizer Control bit 4: This bit together with EQC[3:0] are
R/W
0
used for controlling transmit pulse shaping, transmit line build-out
(LBO), receive monitoring and also T1 or E1 mode of operation.
See Table 5 for description of Equalizer Control bits.
D3
EQC3 Equalizer Control bit 3: See bit D4 description for function of
R/W
0
this bit
D2
EQC2 Equalizer Control bit 2: See bit D4 description for function of
R/W
0
this bit
D1
EQC1 Equalizer Control bit 1: See bit D4 description for function of
R/W
0
this bit
D0
EQC0 Equalizer Control bit 0: See bit D4 description for function of
R/W
0
this bit
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