XRT83L30 Datasheet, PDF (36/78 Pages) Exar Corporation – SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L30
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ONE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.0
PRELIMINARY
N+1 REDUNDANCY
N+1 redundancy has one backup card for N primary cards. Due to impedance mismatch and signal contention,
external relays are necessary when using this redundancy scheme. The advantage of relays is that they create
complete isolation between the primary cards and the backup card. This allows all transmitters and receivers
on the primary cards to be configured in internal impedance mode, providing one bill of materials for all
interface modes of operation. The transmit and receive sections of the XRT83L30 are described separately.
TRANSMIT
For N+1 redundancy, the transmitters on all cards should be programmed for internal impedance mode
providing one bill of materials for T1/E1/J1. The transmitters on the backup card do not have to be tri-stated. To
swap the primary card, close the desired relays, and tri-state the transmitters on the failed primary card. A
0.68µF capacitor is used in series with TTIP for blocking DC bias. See Figure 18 for a simplified block diagram
of the transmit section for an N+1 redundancy scheme.
NOTE: For simplification, the over voltage protection circuitry was omitted.
FIGURE 18. SIMPLIFIED BLOCK DIAGRAM - TRANSMIT SECTION FOR N+1 REDUNDANCY
Backplane Interface
Line Interface Card
Primary Card
XRT83L30
Tx
TxTSEL=1, Internal
0.68µF
1:2
T1/E1 Line
Primary Card
XRT83L30
Tx
TxTSEL=1, Internal
0.68µF
1:2
T1/E1 Line
Primary Card
XRT83L30
Tx
TxTSEL=1, Internal
0.68µF
1:2
T1/E1 Line
Backup Card
XRT83L30
Tx
TxTSEL=1, Internal
0.68µF
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