XRT83L30 Datasheet, PDF (38/78 Pages) Exar Corporation – SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L30
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ONE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.0
PRELIMINARY
PATTERN TRANSMIT AND DETECT FUNCTION
Several test and diagnostic patterns can be generated and detected by the chip. In Hardware mode the
channel can be programmed to transmit an All Ones pattern by applying a “High” level to the corresponding
TAOS pin. In Host mode, the three interface bits TXTEST[2:0] control the pattern generation and detection
according to Table 12.
TABLE 12: PATTERN TRANSMISSION CONTROL
TXTEST2 TXTEST1 TXTEST0
TEST PATTERN
0
0
0
Transmit Data
0
0
1
TAOS
0
1
0
TLUC
0
1
1
TLDC
1
0
0
TDQRSS
1
0
1
TDQRSS & INVQRSS
1
1
0
TDQRSS & INSBER
1
1
1
TDQRSS & INVQRSS & INSBER
TRANSMIT ALL ONES (TAOS)
This feature is available in both Hardware and Host modes. When the Hardware pins or interface bits
TXTEST2="0", TXTEST1="0" and TXTEST0="1", the transmitter ignores input from TPOS/TDATA and TNEG
pins and sends a continuous AMI encoded all ones signal to the line using TCLK clock as the reference. When
TCLK is not available, MCLK is used. In addition, when the Hardware pin or the interface bit ATAOS is
activated, the chip will automatically transmit the All Ones data when the receiver detects an RLOS condition.
The operation of this feature requires that TCLK not be tied "Low".
NETWORK LOOP CODE DETECTION AND TRANSMISSION
This feature is available in both Hardware and Host modes. When the Hardware pins or interface bits
TXTEST2="0", TXTEST1="1" and TXTEST0="0" the chip is enabled to transmit the "00001" Network Loop-Up
Code from a request for a loop-back condition from the remote terminal. Simultaneously setting the interface
bits NLCDE1="0" and NLCDE0="1" enables the Network Loop-Up code detection in the receiver. If the "00001"
Network Loop-Up code is detected in the receive data for longer than 5 seconds, the NLCD bit in the interface
register is set indicating that the remote terminal has activated remote Loop-back and the chip is receiving its
own transmitted data. When Network Loop-Up code is being transmitted the XRT83L30 will ignore the Auto-
matic Loop-Code detection and Remote Loop-back activation (NLCDE1=”1”, NLCDE0=”1”, if activated) in
order to avoid activating Remote Digital Loop-back automatically when the remote terminal responds to the
Loop-back request.
When TXTEST2="0", TXTEST1="1" and TXTEST0="1" the chip is enabled to transmit the Network Loop-Down
Code "001" from the transmitter requesting the remote terminal the removal of the Loop-Back condition.
In both Hardware and Host modes the receiver is capable of monitoring the contents of the receive data for
the presence of Loop-Up or Loop-Down code from the remote terminal. The Hardware pins or interface bits
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