XRT83L30 Datasheet, PDF (32/78 Pages) Exar Corporation – SINGLE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

XRT83L30
áç
ONE-CHANNEL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.0
PRELIMINARY
FIGURE 15. SIMPLIFIED DIAGRAM FOR E1 IN EXTERNAL TERMINATION MODE (RXTSEL= 0)
XRT83L30 LIU
TTIP
9.1 Ω
1:2
TRING
RTIP
9.1 Ω
75 Ω
RRING
1:1
75 Ω
75 Ω
TRANSMITTER
TRANSMIT TERMINATION MODE
In Hardware mode, TXTSEL (Pin 45) can be tied “High” to select internal termination mode or tied “Low” for
external termination. In Host mode, bit 6 in the appropriate register is set “High” to select the internal
termination mode for the transmit channel, see Table 19, “Microprocessor Register #1 bit description,” on
page 46.
TABLE 8: TRANSMIT TERMINATION CONTROL
TXTSEL
0
1
TX TERMINATION
EXTERNAL
INTERNAL
TX TRANSFORMER RATIO
1:2.45
1:2
For internal termination, the transformer turns ratio is always 1:2. In internal mode, no external resistors are
used. An external capacitor of 0.68µF is used for proper operation of the internal termination circuitry, see
Figure 13.
TABLE 9: TERMINATION SELECT CONTROL
TERSEL1
0
0
1
1
TERSEL0
0
1
0
1
TERMINATION
100Ω
110Ω
75Ω
120Ω
EXTERNAL TRANSMIT TERMINATION MODE
By default the XRT83L30 is set for external termination mode at power up or at Hardware reset.
When external transmit termination mode is selected, the internal termination circuitry is disabled. The value of
the external resistors is chosen for a specific application according to the turns ratio selected by TRATIO (Pin
26) in Hardware mode or bit 0 in the appropriate register in Host mode, see Table 10 and Table 21,
“Microprocessor Register #3 bit description,” on page 50. Figure 14 is a simplified block diagram for T1 (100Ω)
in the external termination mode. Figure 15 is a simplified block diagram for E1 (75Ω) in the external
termination mode.
29