XRT72L58 Datasheet, PDF (29/486 Pages) Exar Corporation – EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

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PRELIMINARY
XRT72L58
EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
PIN DESCRIPTION FOR THE XRT72L58
PIN #
B22
B23
B24
B25
PIN NAME
TxOHIns[5]/
TxHDLCDat4[5]
TxNib3[5]/
TxHDLCDat3[5]
RxNib0[2]/
RxHDLCDat0[2]
RxSer[2]/
RxIdle[2]
B26
RxClk[2]
C1
TCK
C2
RxNib3[7]/
RxHDLCDat3[7]
C3
RxOHFrame[7]/
RxHDLCDat4[7]
C4
RxNib0[7]/
RxHDLCDat0[7]
C5
RxSer[7]/
RxIdle[7]
C6
RxOH[7]/
RxHDLCDat6[7]
C7
RxFrame[7]
C8
RxOOF[7]
C9
RxSer[0]/
RxIdle[0]
C10
RxNib0[0]/
RxHDLCDat0[0]
TYPE
I
See Description of Pin A16
DESCRIPTION
I
See Description of Pin A1
O
See Description of Pin A18
O
Receive Serial Output:
If the user opts to operate the XRT72L58 in the "serial" mode, then the chip
will output the payload data, of the incoming DS3 or E3 frames, via this pin.
The XRT72L58 will output this data upon the rising edge of RxClk.
The user is advised to design the Terminal Equipment such that it will sample
this data on the falling edge of RxClk.
NOTE: This signal is only active if the "NibInt" input pin is pulled "low".
Receive Idle:
This pin will go high indicating the idle period of sent HDLC data packets.
Also, in combination with ValFCS it can indicate error conditions.
O
See Description of Pin B9
I
Test Clock: Boundary Scan clock input.
O
See Description of Pin A19
O
See Description of Pin A11
O
See Description of Pin A18
O
See Description of Pin B25
O
See Description of Pin B11
O
See Description of Pin A9
O
See Description of Pin B8
O
See Description of Pin B25
O
See Description of Pin A18
10