XRT72L58 Datasheet, PDF (24/486 Pages) Exar Corporation – EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER

XRT72L58
EIGHT CHANNEL DS3/E3 FRAMER IC WITH HDLC CONTROLLER
REV. P1.1.2
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PRELIMINARY
PIN DESCRIPTION FOR THE XRT72L58
PIN #
A9
PIN NAME
RxFrame[0]
A10
RxNib2[0]/
RxHDLCDat2[0]
A11
RxOHFrame[0]/
RxHDLCDat4[0]
A12
TxNibFrame[0]/
ValFCS[0]
A13
TxOHClk[0]
TYPE
O
O
O
O
O
DESCRIPTION
Receive Boundary of DS3 or E3 Frame Output Indicator:
The exact functionality of this output pin depends upon whether the
XRT72L58 Framer is operating in the “Serial” or “Nibble-Parallel” Mode.
Serial Mode Operation:
The Receive Section of the XRT72L58 will pulse this output pin “high” (for one
bit-period) when the “Receive Payload Data Output Interface” block is driving
the very first bit of a given DS3 or E3 frame, onto the “RxSer” output pin.
Nibble-Parallel Operation:
The Receive Section of the XRT72L58 will pulse this output pin “high” (for one
nibble-period), when the “Receive Payload Data Output Interface” block is
driving the very first nibble of a given DS3 or E3 frame, onto the “RxNib[3:0]
output pins.
Receive Nibble Output - 2:
The Framer will output "Received data (from the Remote Terminal) to the local
Terminal Equipment via this pin along with RxNib0, RxNib1 and RxNib2.
The data at this pin is updated on the rising edge of the RxClk output signal.
NOTE: This output pin is active only if the Nibble-Parallel Mode has been
selected.
Receive HDLC Data Output - 2:
This pin contains bit 2 RxHDLC data when the HDLC controller is turned on.
Receive Overhead Frame Boundary Indicator:
This output pin pulses "high" whenever the Receive Overhead Data Output
Interface” block outputs the first overhead bit (or nibble) of a new DS3 or E3
frame.
Receive HDLC Data Output - 4:
This pin contains bit 4 RxHDLC data when the HDLC controller is turned on.
Transmit Frame Boundary Indicator - Nibble/Parallel Interface:
This output pin pulses "high" when the last nibble of a given DS3 or E3 frame
is expected at the TxNib[3:0] input pins.
The purpose of this output pin is to alert the Terminal Equipment that it needs
to begin transmission of a new DS3 or E3 frame to the XRT72L58.
Valid Frame Check Sequence:
This pin will go high at the end of a valid Frame Check Sequence.
Transmit Overhead Clock:
This output signal serves two purposes:
1. The Transmit Overhead Data Input Interface block will provide a rising clock
edge on this signal, one bit-period prior to the start to the instant that the
“Transmit Overhead Data Input Interface” block is processing an overhead bit.
2. The Transmit Overhead Data Input Interface will sample the data at the
“TxOH” input pin, on the falling edge of this clock signal (provided that the
“TxOHIns” input pin is “HIGH”).
NOTE: The Transmit Overhead Data Input Interface block will supply a clock
edge for all overhead bits within the DS3 or E3 frame (via the “TxOHClk” out-
put signal). This includes those overhead bits that the “Transmit Overhead
Data Input Interface” will not accept from the Terminal Equipment.
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