LM3S6950 Datasheet, PDF (42/524 Pages) List of Unclassifed Manufacturers – Microcontroller

Memory Map
Start
End
Description
For details
on
registers,
see page ...
0x4002.E000
0x4002.FFFF
Reserved
-
0x4003.0000
0x4003.0FFF
Timer0
208
0x4003.1000
0x4003.1FFF
Timer1
208
0x4003.2000
0x4003.2FFF
Timer2
208
0x4003.3000
0x4003.3FFF
Timer3
208
0x4003.4000
0x4003.7FFF
Reserved
-
0x4003.9000
0x4003.BFFF
Reserved
-
0x4003.C000
0x4003.CFFF
Analog Comparators
407
0x4003.D000
0x4003.FFFF
Reserved
-
0x4004.3000
0x4004.7FFF
Reserved
-
0x4004.8000
0x4004.8FFF
Ethernet Controller
371
0x4004.9000
0x4004.BFFF
Reserved
-
0x4004.C000
0x400F.BFFF
Reserved
-
0x400F.C000
0x400F.CFFF
Hibernation Module
120
0x400F.D000
0x400F.DFFF
Flash control
137
0x400F.E000
0x400F.EFFF
System control
64
0x400F.F000
0x400F.FFFF
Reserved
-
0x4011.1000
0x4011.1FFF
Reserved
-
0x4012.0000
0x41FF.FFFF
Reserved for non bit-banded peripheral space
-
0x4200.0000
0x43FF.FFFF
Bit-banded alias of 0x4000.0000 through 0x400F.FFFF -
0x4400.0000
0x5E32.FFFF
Reserved for non bit-banded peripheral space
-
0x5E34.0000
0x5FFF.FFFF
Reserved
-
0x6000.0000
0xDFFF.FFFF
Reserved for external devices
-
Private Peripheral Bus
0xE000.0000
0xE000.1000
0xE000.2000
0xE000.3000
0xE000.0FFF
0xE000.1FFF
0xE000.2FFF
0xE000.DFFF
Instrumentation Trace Macrocell (ITM)
Data Watchpoint and Trace (DWT)
Flash Patch and Breakpoint (FPB)
Reserved
ARM®
Cortex™-M3
Technical
Reference
Manual
0xE000.E000
0xE000.EFFF
Nested Vectored Interrupt Controller (NVIC)
0xE000.F000
0xE003.FFFF
Reserved
0xE004.0000
0xE004.0FFF
Trace Port Interface Unit (TPIU)
0xE004.1000
0xE004.1FFF
Reserved
-
0xE004.2000
0xE00F.FFFF
Reserved
-
0xE010.0000
0xFFFF.FFFF
Reserved for vendor peripherals
-
a. All reserved space returns a bus fault when read or written.
b. The unavailable flash will bus fault throughout this range.
c. The unavailable SRAM will bus fault throughout this range.
42
June 14, 2007
Luminary Micro Confidential-Advance Product Information