LM3S6950 Datasheet, PDF (18/524 Pages) List of Unclassifed Manufacturers – Microcontroller

Table of Contents
Register 40:
Register 41:
Register 42:
Register 43:
Register 44:
Register 45:
Register 46:
PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ................................................ 448
PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C ............................. 449
PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC ............................. 449
PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC ............................. 449
PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................. 450
PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ............................. 450
PWM2 Dead-Band Falling-Edge-Delay (PWM2DBFALL), offset 0x0F0 ............................. 450
QEI ................................................................................................................................................. 451
Register 1: QEI Control (QEICTL), offset 0x000 ................................................................................ 456
Register 2: QEI Status (QEISTAT), offset 0x004 ................................................................................ 458
Register 3: QEI Position (QEIPOS), offset 0x008 .............................................................................. 459
Register 4: QEI Maximum Position (QEIMAXPOS), offset 0x00C ....................................................... 460
Register 5: QEI Timer Load (QEILOAD), offset 0x010 ....................................................................... 461
Register 6: QEI Timer (QEITIME), offset 0x014 ................................................................................. 462
Register 7: QEI Velocity Counter (QEICOUNT), offset 0x018 ............................................................. 463
Register 8: QEI Velocity (QEISPEED), offset 0x01C .......................................................................... 464
Register 9: QEI Interrupt Enable (QEIINTEN), offset 0x020 ............................................................... 465
Register 10: QEI Raw Interrupt Status (QEIRIS), offset 0x024 ............................................................. 466
Register 11: QEI Interrupt Status and Clear (QEIISC), offset 0x028 ..................................................... 467
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June 14, 2007
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