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LM3S6950 Datasheet, PDF (24/524 Pages) List of Unclassifed Manufacturers – Microcontroller | |||
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Architectural Overview
â Separate 16x8 transmit (TX) and 16x12 receive (RX) FIFOs to reduce CPU interrupt service
loading
â Programmable baud-rate generator with fractional divider
â Programmable FIFO length, including 1-byte deep operation providing conventional
double-buffered interface
â FIFO trigger levels of 1/8, ¼, ½, ¾, and 7/8
â Standard asynchronous communication bits for start, stop, and parity
â False-start-bit detection
â Line-break generation and detection
â Analog Comparators
â Three independent integrated analog comparators
â Configurable for output to: drive an output pin or generate an interrupt
â Compare external pin input to external pin input or to internal programmable voltage reference
â I2C
â Master and slave receive and transmit operation with transmission speed up to 100 Kbps in
Standard mode and 400 Kbps in Fast mode
â Interrupt generation
â Master with arbitration and clock synchronization, multimaster support, and 7-bit addressing
mode
â PWM
â Three PWM generator blocks, each with one 16-bit counter, two comparators, a PWM
generator, and a dead-band generator
â One 16-bit counter
⢠Runs in Down or Up/Down mode
⢠Output frequency controlled by a 16-bit load value
⢠Load value updates can be synchronized
⢠Produces output signals at zero and load value
â Two PWM comparators
⢠Comparator value updates can be synchronized
⢠Produces output signals on match
â PWM generator
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June 14, 2007
Luminary Micro Confidential-Advance Product Information
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