LM3S6950 Datasheet, PDF (3/524 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S6950 Microcontroller
Table of Contents
About This Document .................................................................................................................... 19
Audience .............................................................................................................................................. 19
About This Manual ................................................................................................................................ 19
Related Documents ............................................................................................................................... 19
Documentation Conventions .................................................................................................................. 19
1
1.1
1.2
1.3
1.4
1.4.1
1.4.2
1.4.3
1.4.4
1.4.5
1.4.6
1.4.7
Overview ............................................................................................................................. 21
Product Features ...................................................................................................................... 21
Target Applications .................................................................................................................... 26
High-Level Block Diagram ......................................................................................................... 27
Functional Overview .................................................................................................................. 28
ARM Cortex™-M3 ..................................................................................................................... 29
Motor Control Peripherals .......................................................................................................... 29
Serial Communications Peripherals ............................................................................................ 30
System Peripherals ................................................................................................................... 32
Memory Peripherals .................................................................................................................. 32
Additional Features ................................................................................................................... 33
Hardware Details ...................................................................................................................... 33
2
2.1
2.2
2.2.1
2.2.2
2.2.3
2.2.4
2.2.5
2.2.6
Cortex-M3 Core .................................................................................................................. 35
Block Diagram .......................................................................................................................... 36
Functional Description ............................................................................................................... 36
Serial Wire and JTAG Debug ..................................................................................................... 36
Embedded Trace Macrocell (ETM) ............................................................................................. 37
Trace Port Interface Unit (TPIU) ................................................................................................. 37
ROM Table ............................................................................................................................... 37
Memory Protection Unit (MPU) ................................................................................................... 37
Nested Vectored Interrupt Controller (NVIC) ................................................................................ 37
3
Memory Map ....................................................................................................................... 41
4
Interrupts ............................................................................................................................ 43
5
5.1
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.3
5.4
5.4.1
5.4.2
JTAG .................................................................................................................................... 46
Block Diagram .......................................................................................................................... 47
Functional Description ............................................................................................................... 47
JTAG Interface Pins .................................................................................................................. 48
JTAG TAP Controller ................................................................................................................. 49
Shift Registers .......................................................................................................................... 50
Operational Considerations ........................................................................................................ 50
Initialization and Configuration ................................................................................................... 53
Register Descriptions ................................................................................................................ 53
Instruction Register (IR) ............................................................................................................. 53
Data Registers .......................................................................................................................... 55
6
6.1
6.1.1
6.1.2
6.1.3
System Control ................................................................................................................... 57
Functional Description ............................................................................................................... 57
Device Identification .................................................................................................................. 57
Reset Control ............................................................................................................................ 57
Power Control ........................................................................................................................... 60
June 14, 2007
3
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