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LM3S2965 Datasheet, PDF (9/542 Pages) List of Unclassifed Manufacturers – Microcontroller
LM3S2965 Microcontroller
List of Figures
Figure 1-1. Stellaris® Fury-class High-Level Block Diagram ................................................................ 30
Figure 2-1. CPU Block Diagram ......................................................................................................... 38
Figure 2-2. TPIU Block Diagram ........................................................................................................ 39
Figure 5-1. JTAG Module Block Diagram ............................................................................................ 50
Figure 5-2. Test Access Port State Machine ....................................................................................... 53
Figure 5-3. IDCODE Register Format ................................................................................................. 58
Figure 5-4. BYPASS Register Format ................................................................................................ 59
Figure 5-5. Boundary Scan Register Format ....................................................................................... 59
Figure 6-1. External Circuitry to Extend Reset .................................................................................... 61
Figure 7-1. Hibernation Module Block Diagram ................................................................................. 120
Figure 8-1. Flash Block Diagram ...................................................................................................... 137
Figure 9-1. GPIODATA Write Example ............................................................................................. 162
Figure 9-2. GPIODATA Read Example ............................................................................................. 162
Figure 10-1. GPTM Module Block Diagram ........................................................................................ 203
Figure 10-2. 16-Bit Input Edge Count Mode Example .......................................................................... 207
Figure 10-3. 16-Bit Input Edge Time Mode Example ........................................................................... 208
Figure 10-4. 16-Bit PWM Mode Example ............................................................................................ 209
Figure 11-1. WDT Module Block Diagram .......................................................................................... 235
Figure 12-1. ADC Module Block Diagram ........................................................................................... 259
Figure 12-2. Internal Temperature Sensor Characteristic ..................................................................... 262
Figure 13-1. UART Module Block Diagram ......................................................................................... 292
Figure 13-2. UART Character Frame ................................................................................................. 293
Figure 13-3. IrDA Data Modulation ..................................................................................................... 295
Figure 14-1. SSI Module Block Diagram ............................................................................................. 331
Figure 14-2. TI Synchronous Serial Frame Format (Single Transfer) .................................................... 333
Figure 14-3. TI Synchronous Serial Frame Format (Continuous Transfer) ............................................ 334
Figure 14-4. Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 ...................................... 335
Figure 14-5. Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .............................. 335
Figure 14-6. Freescale SPI Frame Format with SPO=0 and SPH=1 ..................................................... 336
Figure 14-7. Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0 ........................... 336
Figure 14-8. Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0 .................... 337
Figure 14-9. Freescale SPI Frame Format with SPO=1 and SPH=1 ..................................................... 338
Figure 14-10. MICROWIRE Frame Format (Single Frame) .................................................................... 338
Figure 14-11. MICROWIRE Frame Format (Continuous Transfer) ......................................................... 339
Figure 14-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements ........................ 340
Figure 15-1. I2C Block Diagram ......................................................................................................... 366
Figure 15-2. I2C Bus Configuration .................................................................................................... 367
Figure 15-3. START and STOP Conditions ......................................................................................... 367
Figure 15-4. Complete Data Transfer with a 7-Bit Address ................................................................... 368
Figure 15-5. R/S Bit in First Byte ........................................................................................................ 368
Figure 15-6. Data Validity During Bit Transfer on the I2C Bus ............................................................... 368
Figure 15-7. Master Single SEND ...................................................................................................... 371
Figure 15-8. Master Single RECEIVE ................................................................................................. 372
Figure 15-9. Master Burst SEND ....................................................................................................... 373
Figure 15-10. Master Burst RECEIVE .................................................................................................. 374
Figure 15-11. Master Burst RECEIVE after Burst SEND ........................................................................ 375
June 04, 2007
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Preliminary