LM3S2965 Datasheet, PDF (282/542 Pages) List of Unclassifed Manufacturers – Microcontroller

Analog-to-Digital Converter (ADC)
Register 20: ADC Sample Sequence Control 1 (ADCSSCTL1), offset 0x064
This register contains the configuration information for each sample for a sequence executed with
Sample Sequencer 1. When configuring a sample sequence, the END bit must be set at some point,
whether it be after the first sample, last sample, or any sample in between. This register is 16-bits
wide and contains information for four possible samples.
ADC Sample Sequence Control 1 (ADCSSCTL1)
Base 0x4003.8000
Offset 0x064
Type R/W, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TS3
IE3
END3
D3
TS2
IE2
END2
D2
TS1
IE1
END1
D1
TS0
IE0
END0
D0
Type R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Name
reserved
TS3
IE3
END3
D3
TS2
IE2
END2
D2
TS1
IE1
END1
D1
TS0
IE0
END0
D0
Type
RO
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Same definition as TS7 but used during the fourth sample.
Same definition as IE7 but used during the fourth sample.
Same definition as END7 but used during the fourth sample.
Same definition as D7 but used during the fourth sample.
Same definition as TS7 but used during the third sample.
Same definition as IE7 but used during the third sample.
Same definition as END7 but used during the third sample.
Same definition as D7 but used during the third sample.
Same definition as TS7 but used during the second sample.
Same definition as IE7 but used during the second sample.
Same definition as END7 but used during the second sample.
Same definition as D7 but used during the second sample.
Same definition as TS7 but used during the first sample.
Same definition as IE7 but used during the first sample.
Same definition as END7 but used during the first sample.
Since this sequencer has only one entry, this bit must be set.
Same definition as D7 but used during the first sample.
282
June 04, 2007
Preliminary