LM3S2965 Datasheet, PDF (279/542 Pages) List of Unclassifed Manufacturers – Microcontroller

LM3S2965 Microcontroller
Register 13: ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0), offset 0x048
Register 14: ADC Sample Sequence Result FIFO 1 (ADCSSFIFO1), offset 0x068
Register 15: ADC Sample Sequence Result FIFO 2 (ADCSSFIFO2), offset 0x088
This register contains the conversion results for samples collected with the Sample Sequencer (the
ADCSSFIF0 register is used for Sample Sequencer 0, ADCSSFIFO1 for Sequencer 1, and
ADCSSFIFO2 for Sequencer 2). Reads of this register return conversion result data in the order
sample 0, sample 1, and so on, until the FIFO is empty. If the FIFO is not properly handled by
software, overflow and underflow conditions are registered in the ADCOSTAT and ADCUSTAT
registers.
ADC Sample Sequence Result FIFO 0 (ADCSSFIFO0)
Base 0x4003.8000
Offset 0x048
Type RO, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
DATA
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:10
9:0
Name
reserved
DATA
Type
RO
RO
Reset
0
0
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Conversion result data.
June 04, 2007
279
Preliminary