S-7600A Datasheet, PDF (7/55 Pages) Seiko Instruments Inc – Hardware Specification (TCP/IP Network Stack LSI)

S-7600A
Hardware Specification
1. Introduction
1.1. Product Overview
The S-7600A is a LSI that integrates TCP/IP network stack. It offers your devices a quicker and easier
connectivity to a network with its on-chip serial interface and a static RAM that operates as a buffer.
Implementing this LSI into your system can significantly reduce your software development cost. Also
its low operating frequency gives benefits to the power consumption.
The S-7600A also supports a microprocessor interface via the iReady iAPI^TM register set, and
connection to Physical Transport Layer Interface. iAPI consists of a set of register and operating
definitions that allow any micro controller system to interface with the internal modules.
1.2. Features


Industry standard protocols support :
TCP/IP (Ver. 4.0)
PPP (STD-51-compliant)
UDP


General purpose sockets :
Configured for two sockets


MPU interface :
68k/x80(MOTO/Intel) bus interface or Synchronous serial interface


Physical Transport Layer Interface :
Universal Asynchronous Receiver/Transmitter (UART)


Low clock rate :
Multiplied four by the bit-rate


Operating frequency :
256kHz typical


Low power consumption :
Full-transmitting Operating current consumption : 0.9mA typ.
Non-transmitting Operating current consumption : 150µA typ.
Standby current consumption : 1.0µA typ.


Stand-by mode :
held by RESET signal


Wide operating voltage range :
2.4V to 3.6V


Easier application development :
portable iAPI^TM support
1.3. Benefits


Off-loads MIPS allowing system to operate with low end and low cost processors.


Consumes minimal power-up to 1/100 of competing solution.
Seiko Instruments Inc.
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