S-7600A Datasheet, PDF (31/55 Pages) Seiko Instruments Inc – Hardware Specification (TCP/IP Network Stack LSI)

S-7600A
Hardware Specification
Table 7-10
Master Interrupt Register Descriptions (Continued)
Bit
Bit Name
2
PT_INT
1
LINK_INT
0
SOCK_INT
Access
R
R
R
Description
Physical Transport Interrupt
The physical transport triggers this interrupt. An
application should check the Serial Port Int register
to determine the actual cause of the interrupt.
Link Layer Interrupt
The link layer triggers this interrupt. An application
should check the PPP Interrupt Code register to
determine the actual cause of the interrupt.
Socket Interrupt
One of the sockets that need servicing causes this
interrupt. An application should check the Socket
Interrupt register to determine the actual socket
number.
7.3.5.
Serial Port Configuration / Status Register (0x08)
(Read/Write, Default 0X0XX110B)
This register configures the serial port as shown in Table 7-11 and Table 7-12.
Table 7-11
Conf Status Register Bit Definitions
Bit
7
6
5
4
3
Def.
S_DAV DCD
DSR/
CTS
RI
HWFC
Default
0
-
0
-
-
2
DTR
1
1
RTS
0
SCTL
1
0
Seiko Instruments Inc.
25