S-7600A Datasheet, PDF (40/55 Pages) Seiko Instruments Inc – Hardware Specification (TCP/IP Network Stack LSI)

S-7600A
Hardware Specification
Table 7-30
Socket Interrupt Register Description
Bit
Bit Name
1 I1
0 I0
Access
R
R
Description
This bit is used to indicate that socket 1 has an
interrupt pending.
0 = General socket 1 interrupt inactive
1 = General socket 1 interrupt active
This bit is used to indicate that socket 0 has an
interrupt pending.
0 = General socket 0 interrupt inactive
1 = General socket 0 interrupt active
7.3.18. Socket Data Available Register (0x28)
(Read-Only, Default 0x00)
This read-only register indicates which socket has data pending in the input buffer. A “1” in a bit
position indicates that the socket has data available. The bit remains set as long as there is data
available.
Table 7-31
Socket Data Avail Register Bit Definitions
Bit
7
6
5
4
3
Def.
-
-
-
-
-
Default
0
0
0
0
0
2
1
0
-
DAV1
DAV0
0
0
0
Table 7-32
Socket Data Avail Register Description
Bit
Bit Name
1 DAV1
0 DAV0
Access
R
R
Description
This bit is used to indicate that socket 1 has data
available.
0 = General socket 1 has no data available
1 = General socket 1 has data available
This bit is used to indicate that socket 0 has data
available.
0 = General socket 0 has data available
1 = General socket 0 has data available
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