S-7600A Datasheet, PDF (25/55 Pages) Seiko Instruments Inc – Hardware Specification (TCP/IP Network Stack LSI)

S-7600A
Hardware Specification
6.3. Memory Map
A custom memory map is generated to compact the size of the SRAM required to support S-7600A. S-
7600A has two 5K byte memory banks (0 and 1). This mapping is as shown in Table 6-1 and Table 6-
2.
Table 6-1
S-7600A Memory Map (Bank 0)
Address
0x0000 - 0x07FF
0x0800 - 0x0BFF
0x0C00 - 0x0FFF
0x1000 - 0x13FF
Size
2K
1K
1K
1K
Contents
Socket 0 Receive Buffer
Socket 0 Send Buffer
TCP Data Base
IP Buffer
Table 6-2
S-7600A Memory Map (Bank 1)
Address
0x0000 - 0x07FF
0x0800 - 0x0BFF
0x0C00 - 0x0FFF
0x1000 - 0x13FF
Size
2K
1K
1K
1K
Contents
Socket 1 Receive Buffer
Socket 1 Send Buffer
PPP Buffer
PAP Buffer
Seiko Instruments Inc.
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