S-7600A Datasheet, PDF (38/55 Pages) Seiko Instruments Inc – Hardware Specification (TCP/IP Network Stack LSI)

S-7600A
Hardware Specification
7.3.15. Socket Status Mid Register (0x23)
(Read-Only, Default 0x00)
This read-only register reports other socket status conditions.
Table 7-25
Socket Status Mid Register Bit Definitions
Bit
7
6
5
4
3
2
1
0
Def.
URG
RST
Term ConU
TCP State
Default
0
0
0
0
0x0
Table 7-26
Socket Status Mid Register Description
Bit
Bit Name
7
URG
6
RST
5
Term
4
ConU
3:0 TCP State
Access
R
R
R
R
R
Description
This bit indicates the arrival of urgent data. Writing a “1” to the
URG bit in the Socket Interrupt register (bit 7) clears this bit.
0 = No urgent data present
1 = Urgent data present
This bit indicates when the socket receives the RST signal
from the TCP peer.
0 = No RST received
1 = RST received
This bit indicates when the socket terminates from the source
and triggers an interrupt if the Term_En bit is set in the Socket
Interrupt Mask High register (0x2B). The interrupt mask setting
does not effect the reporting of this status bit.
0 = Normal Operating Condition
1 = Socket terminated from source
This bit becomes “1” when the S-7600A receives a TCP
segment with the FIN flag on. This means that the remote peer
has requested to close the TCP connection.
This bit indicates when the socket establishes a connection to
a host machine. The bit clears when the connection terminates
(by either end).
0 = No Connection Established
1 = Connection Established
These bits indicate the current TCP state.
0 = CLOSED
1 = SYN_SENT
2 = ESTABLISHED
3 = CLOSE_WAIT
4 = LAST_ACK
5 = FIN_WAIT1
6 = FIN_WAIT2
7 = CLOSING
8 = TIME_WAIT
9 = LISTEN
a = SYN_RECVD
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Seiko Instruments Inc.