AM186 Datasheet, PDF (99/112 Pages) Advanced Micro Devices – High-Performance, 80C186- and 80C188-Compatible, 16-Bit Embedded Microcontrollers with RAM

Switching Characteristics over Commercial and Industrial Operating Ranges
Reset and Bus Hold (25 MHz and 33 MHz)
Preliminary
Parameter
25 MHz
33 MHz
No. Symbol Description
Min
Max
Min
Max Unit
Reset and Bus Hold Timing Requirements
5
t_CLAV AD Address Valid Delay
0
20
0
15 ns
15
t_CLAZ AD Address Float Delay
0
20
0
15 ns
57
t_RESIN RES Setup Time
58
t_HVCL HOLD Setup^(a)
10
8
ns
10
8
ns
Reset and Bus Hold Timing Responses
62
t_CLHAV HLDA Valid Delay
0
20
0
15 ns
63
t_CHCZ Command Lines Float Delay
20
15 ns
64
t_CHCV Command Lines Valid Delay (after Float)
20
15 ns
Notes:
All timing parameters are measured at V_CC/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with C_L=50 pF. For switching tests, V_IL=0.3 V and V_IH =V_CC–0.3 V.
a This timing must be met to guarantee recognition at the next clock.
Switching Characteristics over Commercial and Industrial Operating Ranges
T _{Reset and Bus Hold (40 MHz and 50 MHz)}
Preliminary
F ^Parameter
40 MHz
50 MHz
No. Symbol Description
Min
Max
Min
Max
Reset and Bus Hold Timing Requirements
5
t_{CLAV AD Address Valid Delay}
0
12
0
10
15
t_{CLAZ AD Address Float Delay}
0
12
0
10
A ₅₇
t_{RESIN RES Setup Time}
58
t_{HVCL HOLD Setup}^(a)
5
5
5
5
Reset and Bus Hold Timing Responses
62
t_CLHAV HLDA Valid Delay
0
12
0
10
R ₆₃
t_CHCZ Command Lines Float Delay
12
10
64
t_CHCV Command Lines Valid Delay (after Float)
12
10
Notes:
D ^{All timing parameters are measured at VCC/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All}
Unit
ns
ns
ns
ns
ns
ns
ns
output test conditions are with C_L=50 pF. For switching tests, V_IL=0.3 V and V_IH =V_CC–0.3 V.
a This timing must be met to guarantee recognition at the next clock.
Am186^TMER and Am188^TMER Microcontrollers Data Sheet
99