AM186 Datasheet, PDF (74/112 Pages) Advanced Micro Devices – High-Performance, 80C186- and 80C188-Compatible, 16-Bit Embedded Microcontrollers with RAM

Switching Characteristics over Commercial and Industrial Operating Ranges
Write Cycle (40 MHz and 50 MHz)
Preliminary
Parameter
40 MHz
50 MHz
No. Symbol Description
Min
Max
Min
Max Unit
General Timing Responses
3
t_CHSV Status Active Delay
0
12
0
10 ns
4
t_CLSH Status Inactive Delay
5
t_CLAV AD Address Valid Delay
7
t_CLDV Data Valid Delay
8
t_CHDX Status Hold Time
9
t_CHLH ALE Active Delay
10
t_LHLL ALE Width
0
12
0
10 ns
0
12
0
10 ns
0
12
0
10 ns
0
0
ns
12
10 ns
t_CLCL – 5 = 20
15
ns
11
t_CHLL ALE Inactive Delay
12
t_AVLL AD Address Valid to ALE Low^(a)
13
t_LLAX AD Address Hold from ALE Inactive^(a)
14
t_AVCH AD Address Valid to Clock High
16
t_CLCSV MCS/PCS Active Delay
17
t_CXCSX
MCS/PCS Hold from Command
Inactive^(a)
18
t_CHCSX MCS/PCS Inactive Delay
19
t_DXDL DEN Inactive to DT/R Low^(a)
20
t_CVCTV Control Active Delay 1^(b)
23
t_LHAV ALE High to Address Valid
Write Cycle Timing Responses
30
31
32
33
34
35
65
67
68
87
Notes:
t_CLDOX Data Hold Time
t_CVCTX
t_WLWH
t_WHLH
t_WHDX
t_WHDEX
R ^tAVWL
t_CHCSV
t_CHAV
D^tAVBL
Control Inactive Delay^(b)
WR Pulse Width
WR Inactive to ALE High^(a)
Data Hold after WR^(a)
WR Inactive to DEN Inactive^(a)
A Address Valid to WR Low
CLKOUTA High to LCS/UCS Valid
CLKOUTA High to A Address Valid
A Address Valid to WHB, WLB Low
t_CLCH
t_CHCL
0
0
t_CLCH
0
0
A0
7.5
0
0
2t_CLCL – 10 = 40
t_CLCH – 2
t_CLCL – 10 = 15
t_CLCH
t_CLCL+t_CHCL–1.25
0
0
t_CHCL – 1.25
12
t_CLCH
t_CHCL
0
12
0
F^tCLCH
12
0
0
12
0
5
10 ns
Tns
ns
ns
10 ns
ns
10 ns
ns
10 ns
ns
0
ns
12
0
10 ns
35
ns
t_CLCH – 2
ns
12
ns
t_CLCH
ns
t_CLCL+t_CHCL–1.25
ns
12
0
10 ns
10
0
10 ns
12 t_CHCL–1.25 10 ns
All timing parameters are measured at V_CC/2 with 50 pF loading on CLKOUTA, unless otherwise noted. All
output test conditions are with C_L=50 pF. For switching tests, V_IL=0.3 V and V_IH =V_CC–0.3 V.
a Testing is performed with equal loading on referenced pins.
b This parameter applies to the DEN, INTA1–INTA0, WR, WHB, and WLB signals.
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Am186^TMER and Am188^TMER Microcontrollers Data Sheet