EP3SL50F780C4 Datasheet, PDF (76/341 Pages) Altera Corporation – Stratix III Device Handbook

1–66
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
EP3SL70 I/O Timing Parameters
Table 1–51 through Table 1–54 list the maximum I/O timing parameters for EP3SL70
devices for single-ended I/O standards.
Table 1–51 lists the EP3SL70 column pins input timing parameters for single-ended
I/O standards.
Table 1–51. EP3SL70 Column Pins Input Timing Parameters (Part 1 of 3)
I/O
Standard
Clock
Fast Model
C2
Industrial Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
Units
t_su -0.812
GCLK
3.3-V LVTTL
t_h 0.934
GCLK ^tsu ^-0.965
PLL
t_h 1.216
3.3-V
LVCMOS
t_su -0.812
GCLK
t_h 0.934
GCLK ^tsu ^-0.965
PLL
t_h 1.216
t_su -0.823
GCLK
t_h 0.945
3.0-V LVTTL
GCLK ^tsu ^-0.976
PLL
t_h 1.227
3.0-V
LVCMOS
t_su -0.823
GCLK
t_h 0.945
GCLK ^tsu ^-0.976
PLL
t_h 1.227
2.5 V
t_su -0.818
GCLK
t_h 0.940
GCLK ^tsu ^-0.971
PLL
t_h 1.222
1.8 V
t_su -0.840
GCLK
t_h 0.964
GCLK ^tsu ^-0.993
PLL
t_h 1.246
1.5 V
t_su -0.830
GCLK
t_h 0.954
GCLK ^tsu ^-0.983
PLL
t_h 1.236
1.2 V
GCLK ^{tsu -0.778}
t_h 0.902
GCLK ^tsu ^-0.931
PLL
t_h 1.184
-0.811
0.934
-0.965
1.216
-0.811
0.934
-0.965
1.216
-0.822
0.945
-0.976
1.227
-0.822
0.945
-0.976
1.227
-0.817
0.940
-0.971
1.222
-0.839
0.964
-0.993
1.246
-0.829
0.954
-0.983
1.236
-0.777
0.902
-0.931
1.184
-1.154 -1.261 -1.312 -1.266 -1.645 -1.261 -1.312 -1.266 -1.645 ns
1.327 1.457 1.533 1.475 1.850 1.457 1.533 1.475 1.850 ns
-1.395 -1.522 -1.763 -1.703 -2.094 -1.522 -1.763 -1.703 -2.094 ns
1.764 1.937 2.222 2.138 2.540 1.937 2.222 2.138 2.540 ns
-1.154 -1.261 -1.312 -1.266 -1.645 -1.261 -1.312 -1.266 -1.645 ns
1.327 1.457 1.533 1.475 1.850 1.457 1.533 1.475 1.850 ns
-1.395 -1.522 -1.763 -1.703 -2.094 -1.522 -1.763 -1.703 -2.094 ns
1.764 1.937 2.222 2.138 2.540 1.937 2.222 2.138 2.540 ns
-1.153 -1.263 -1.311 -1.265 -1.644 -1.263 -1.311 -1.265 -1.644 ns
1.326 1.459 1.532 1.474 1.849 1.459 1.532 1.474 1.849 ns
-1.394 -1.524 -1.762 -1.702 -2.093 -1.524 -1.762 -1.702 -2.093 ns
1.763 1.939 2.221 2.137 2.539 1.939 2.221 2.137 2.539 ns
-1.153 -1.263 -1.311 -1.265 -1.644 -1.263 -1.311 -1.265 -1.644 ns
1.326 1.459 1.532 1.474 1.849 1.459 1.532 1.474 1.849 ns
-1.394 -1.524 -1.762 -1.702 -2.093 -1.524 -1.762 -1.702 -2.093 ns
1.763 1.939 2.221 2.137 2.539 1.939 2.221 2.137 2.539 ns
-1.162 -1.275 -1.330 -1.284 -1.663 -1.275 -1.330 -1.284 -1.663 ns
1.335 1.471 1.551 1.493 1.868 1.471 1.551 1.493 1.868 ns
-1.403 -1.536 -1.781 -1.721 -2.112 -1.536 -1.781 -1.721 -2.112 ns
1.772 1.951 2.240 2.156 2.558 1.951 2.240 2.156 2.558 ns
-1.202 -1.311 -1.328 -1.282 -1.661 -1.311 -1.328 -1.282 -1.661 ns
1.375 1.507 1.549 1.491 1.866 1.507 1.549 1.491 1.866 ns
-1.443 -1.572 -1.779 -1.719 -2.110 -1.572 -1.779 -1.719 -2.110 ns
1.812 1.987 2.238 2.154 2.556 1.987 2.238 2.154 2.556 ns
-1.179 -1.279 -1.258 -1.212 -1.591 -1.279 -1.258 -1.212 -1.591 ns
1.352 1.475 1.479 1.421 1.796 1.475 1.479 1.421 1.796 ns
-1.420 -1.540 -1.709 -1.649 -2.040 -1.540 -1.709 -1.649 -2.040 ns
1.789 1.955 2.168 2.084 2.486 1.955 2.168 2.084 2.486 ns
-1.102 -1.180 -1.102 -1.056 -1.435 -1.180 -1.102 -1.056 -1.435 ns
1.275 1.376 1.323 1.265 1.640 1.376 1.323 1.265 1.640 ns
-1.343 -1.441 -1.553 -1.493 -1.884 -1.441 -1.553 -1.493 -1.884 ns
1.712 1.856 2.012 1.928 2.330 1.856 2.012 1.928 2.330 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation