EP3SL50F780C4 Datasheet, PDF (325/341 Pages) Altera Corporation – Stratix III Device Handbook

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
1–315
EP3SL150 Clock Timing Parameters
Table 1–160 and Table 1–161 list the global clock timing parameters for EP3SL150
devices.
Table 1–160. EP3SL150 Column Pin Global Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
C2
C3
C4
C4L
I3
I4
I4L
Industrial
Commercial
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
0.9 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
1.1 V
V_CCL=
0.9 V
Unit
1.898
1.926
2.692 2.920 3.294 3.170 3.719 2.920 3.294 3.170 3.719 ns
1.898
1.926
2.692 2.920 3.294 3.170 3.719 2.920 3.294 3.170 3.719 ns
-0.054
-0.028 -0.252 -0.342 -0.296 -0.239 -0.018 -0.342 -0.296 -0.239 -0.018 ns
-0.054
-0.028 -0.252 -0.342 -0.296 -0.239 -0.018 -0.342 -0.296 -0.239 -0.018 ns
Table 1–161. EP3SL150 Row Pin Global Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
C2
Industrial
Commercial
V_CCL=
1.1 V
C3
V_CCL=
1.1 V
C4
V_CCL=
1.1 V
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
I3
V_CCL=
1.1 V
I4
V_CCL=
1.1 V
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
Units
1.868
2.010
2.750 2.982 3.347 3.224 3.506 3.048 3.400 3.293 3.549 ns
1.786
1.919
2.608 2.819 3.166 3.053 3.347 2.878 3.211 3.114 3.390 ns
0.007
0.059 -0.202 -0.255 -0.231 -0.184 -0.214 -0.210 -0.173 -0.122 -0.249 ns
-0.075
-0.032 -0.347 -0.418 -0.412 -0.355 -0.373 -0.380 -0.362 -0.301 -0.408 ns
Table 1–162 and Table 1–163 list the regional clock timing parameters for EP3SL150
devices.
Table 1–162. EP3SL150 Column Pin Regional Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.683
1.683
-0.043
-0.043
1.701
1.701
-0.016
-0.016
C2
V_CCL=
1.1 V
2.375
2.375
-0.240
-0.240
C3
V_CCL=
1.1 V
2.595
2.595
-0.329
-0.329
C4
V_CCL=
1.1 V
2.936
2.936
-0.284
-0.284
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.833 3.255
2.833 3.255
-0.227 -0.005
-0.227 -0.005
I3
V_CCL=
1.1 V
2.595
2.595
-0.329
-0.329
I4
V_CCL=
1.1 V
2.936
2.936
-0.284
-0.284
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.833 3.255
2.833 3.255
-0.227 -0.005
-0.227 -0.005
Units
ns
ns
ns
ns
Table 1–163. EP3SL150 Row Pin Regional Clock Timing Specifications
Parameter
t_CIN
t_COUT
t_PLLCIN
t_PLLCOUT
Fast Model
Industrial Commercial
1.683
1.601
-0.007
-0.089
1.793
1.702
0.068
-0.023
C2
V_CCL=
1.1 V
2.441
2.299
-0.192
-0.337
C3
V_CCL=
1.1 V
2.659
2.496
-0.269
-0.432
C4
V_CCL=
1.1 V
2.987
2.806
-0.221
-0.402
C4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.875 3.042
2.704 2.883
-0.188 -0.211
-0.359 -0.370
I3
V_CCL=
1.1 V
2.719
2.549
-0.226
-0.396
I4
V_CCL=
1.1 V
3.047
2.858
-0.186
-0.375
I4L
V_CCL=
1.1 V
V_CCL=
0.9 V
2.951 3.096
2.772 2.937
-0.135 -0.260
-0.314 -0.419
Units
ns
ns
ns
ns
© July 2010 Altera Corporation
Stratix III Device Handbook, Volume 2