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EP3SL50F780C4 Datasheet, PDF (108/341 Pages) Altera Corporation – Stratix III Device Handbook | |||
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1â98
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1â62. EP3SL110 Row Pins Input Timing Parameters (Part 3 of 3)
I/O
Standard
Clock
Fast Model
Industrial Commercial
C2
VCCL=
1.1 V
C3
VCCL=
1.1 V
C4
VCCL=
1.1 V
C4L
VCCL=
1.1 V
VCCL=
0.9 V
I3
VCCL=
1.1 V
I4
VCCL=
1.1 V
I4L
VCCL=
1.1 V
VCCL=
0.9 V
Units
GCLK tsu
1.2-V HSTL
th
CLASS I
GCLK tsu
PLL th
GCLK tsu
1.2-V HSTL
th
CLASS II
GCLK tsu
PLL th
3.0-V PCI
GCLK tsu
th
GCLK tsu
PLL th
3.0-V
PCI-X
GCLK tsu
th
GCLK tsu
PLL th
-0.754
0.871
1.087
-0.835
-0.754
0.871
1.087
-0.835
-0.916
1.031
0.986
-0.735
-0.916
1.031
0.986
-0.735
-0.795
0.928
1.100
-0.832
-0.795
0.928
1.100
-0.832
-0.894
1.026
1.002
-0.735
-0.894
1.026
1.002
-0.735
-1.135 -1.224 -1.312 -1.266 -1.596 -1.226 -1.310 -1.267 -1.639 ns
1.324 1.432 1.542 1.485 1.815 1.443 1.550 1.496 1.858 ns
1.765 1.995 2.226 2.111 2.053 2.008 2.242 2.125 2.100 ns
-1.364 -1.547 -1.727 -1.640 -1.575 -1.551 -1.733 -1.644 -1.619 ns
-1.135 -1.224 -1.312 -1.266 -1.596 -1.226 -1.310 -1.267 -1.639 ns
1.324 1.432 1.542 1.485 1.815 1.443 1.550 1.496 1.858 ns
1.765 1.995 2.226 2.111 2.053 2.008 2.242 2.125 2.100 ns
-1.364 -1.547 -1.727 -1.640 -1.575 -1.551 -1.733 -1.644 -1.619 ns
-1.249 -1.442 -1.562 -1.607 -1.846 -1.464 -1.556 -1.610 -1.886 ns
1.437 1.649 1.795 1.825 2.069 1.681 1.799 1.836 2.109 ns
1.649 1.861 1.973 1.857 1.801 1.871 1.993 1.875 1.851 ns
-1.249 -1.411 -1.472 -1.385 -1.319 -1.412 -1.481 -1.393 -1.366 ns
-1.249 -1.442 -1.562 -1.607 -1.846 -1.464 -1.556 -1.610 -1.886 ns
1.437 1.649 1.795 1.825 2.069 1.681 1.799 1.836 2.109 ns
1.649 1.861 1.973 1.857 1.801 1.871 1.993 1.875 1.851 ns
-1.249 -1.411 -1.472 -1.385 -1.319 -1.412 -1.481 -1.393 -1.366 ns
Table 1â63 lists the EP3SL110 column pins output timing parameters for single-ended
I/O standards.
Table 1â63. EP3SL110 Column Pins Output Timing Parameters (Part 1 of 7)
I/O
Standard
Clock
Fast Model
C2
Industrial
Commercial
VCCL=
1.1 V
C3
VCCL=
1.1 V
C4
VCCL=
1.1 V
C4L
VCCL= VCCL=
1.1 V 0.9 V
I3
VCCL=
1.1 V
I4
VCCL=
1.1 V
I4L
VCCL= VCCL=
1.1 V 0.9 V
Units
GCLK tco 3.439
4mA
GCLK
PLL tco
3.829
3.439
3.829
4.768 5.145 5.638 5.507 5.801 5.145 5.638 5.507 5.801 ns
5.344 5.778 6.326 6.168 6.550 5.778 6.326 6.168 6.550 ns
3.3-V
LVTTL
GCLK tco
8mA GCLK
PLL tco
GCLK tco
12mA GCLK
PLL tco
3.372
3.762
3.286
3.676
3.372
3.762
3.286
3.676
4.659 5.034 5.525 5.394 5.688 5.034 5.525 5.394 5.688 ns
5.235 5.667 6.213 6.055 6.437 5.667 6.213 6.055 6.437 ns
4.556 4.936 5.433 5.302 5.596 4.936 5.433 5.302 5.596 ns
5.131 5.568 6.121 5.963 6.345 5.568 6.121 5.963 6.345 ns
GCLK tco
16mA GCLK
PLL tco
3.279
3.669
3.279
3.669
4.539 4.908 5.392 5.261 5.555 4.908 5.392 5.261 5.555 ns
5.114 5.540 6.080 5.922 6.304 5.540 6.080 5.922 6.304 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation
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