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EP3SL50F780C4 Datasheet, PDF (118/341 Pages) Altera Corporation – Stratix III Device Handbook
◁
1–108
Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–64. EP3SL110 Row Pins Output Timing Parameters (Part 4 of 4)
I/O
Standard
Clock
Fast Model
Industrial Commercial
C2 C3
VCCL= VCCL=
1.1 V 1.1 V
C4
VCCL=
1.1 V
C4L
VCCL= VCCL=
1.1 V 0.9 V
I3
VCCL=
1.1 V
I4
VCCL=
1.1 V
I4L
VCCL= VCCL=
1.1 V 0.9 V
Units
4mA
GCLK tco
GCLK
PLL
tco
3.024
1.256
3.256
1.429
4.603 4.987 5.478 5.352 5.614 5.105 5.597 5.470 5.690 ns
1.826 1.912 2.107 2.127 2.112 2.010 2.208 2.227 2.101 ns
6mA
GCLK tco
GCLK
PLL
tco
3.012
1.244
3.244
1.417
4.594 4.979 5.470 5.344 5.606 5.097 5.590 5.463 5.683 ns
1.817 1.904 2.099 2.119 2.108 2.002 2.201 2.220 2.097 ns
1.8-V
HSTL
CLASS I
8mA
GCLK tco
GCLK
PLL
tco
2.999
1.231
3.232
1.405
4.585 4.970 5.462 5.336 5.598 5.089 5.582 5.455 5.675 ns
1.808 1.895 2.091 2.111 2.101 1.994 2.193 2.212 2.090 ns
GCLK tco
10mA
GCLK
PLL
tco
3.001
1.233
3.234
1.407
4.588 4.973 5.465 5.339 5.601 5.092 5.585 5.458 5.678 ns
1.811 1.898 2.094 2.114 2.105 1.997 2.196 2.215 2.093 ns
GCLK tco
12mA
GCLK
PLL
tco
2.994
1.226
3.229
1.402
4.586 4.972 5.465 5.339 5.601 5.092 5.586 5.459 5.679 ns
1.809 1.897 2.094 2.114 2.108 1.997 2.197 2.216 2.098 ns
1.8-V
GCLK tco
HSTL
CLASS II
16mA
GCLK
PLL
tco
3.001
1.232
3.234
1.406
4.581 4.964 5.457 5.330 5.595 5.083 5.575 5.448 5.670 ns
1.804 1.889 2.085 2.105 2.104 1.988 2.186 2.205 2.092 ns
4mA
GCLK tco
GCLK
PLL
tco
3.031
1.263
3.263
1.436
4.614 5.000 5.493 5.367 5.629 5.117 5.611 5.484 5.704 ns
1.837 1.925 2.122 2.142 2.127 2.022 2.222 2.241 2.115 ns
1.5-V
HSTL
CLASS I
6mA
GCLK tco
GCLK
PLL
tco
3.019
1.251
3.253
1.426
4.610 4.996 5.489 5.363 5.625 5.114 5.608 5.481 5.701 ns
1.833 1.921 2.118 2.138 2.123 2.019 2.219 2.238 2.112 ns
8mA
GCLK tco
GCLK
PLL
tco
3.015
1.247
3.248
1.421
4.604 4.990 5.483 5.357 5.619 5.108 5.602 5.475 5.695 ns
1.827 1.915 2.112 2.132 2.117 2.013 2.213 2.232 2.106 ns
4mA
GCLK tco
GCLK
PLL
tco
3.030
1.262
3.262
1.435
4.625 5.014 5.511 5.385 5.647 5.131 5.628 5.501 5.721 ns
1.848 1.939 2.140 2.160 2.145 2.036 2.239 2.258 2.132 ns
1.2-V
HSTL
CLASS I
6mA
GCLK tco
GCLK
PLL
tco
3.018
1.250
3.250
1.423
4.614 5.002 5.499 5.373 5.635 5.120 5.617 5.490 5.710 ns
1.837 1.927 2.128 2.148 2.133 2.025 2.228 2.247 2.121 ns
8mA
GCLK tco
GCLK
PLL
tco
3.014
1.246
3.248
1.421
4.618 5.007 5.505 5.379 5.641 5.126 5.624 5.497 5.717 ns
1.841 1.932 2.134 2.154 2.139 2.031 2.235 2.254 2.128 ns
GCLK tco 3.137
3.0-V PCI
—
GCLK
PLL
tco
1.351
3.357
1.526
4.654 5.031 5.518 5.390 5.656 5.165 5.639 5.511 5.734 ns
1.872 1.951 2.138 2.158 2.146 2.051 2.242 2.261 2.138 ns
3.0-V
PCI-X
GCLK tco 3.137
—
GCLK
PLL
tco
1.351
3.357
1.526
4.654 5.031 5.518 5.390 5.656 5.165 5.639 5.511 5.734 ns
1.872 1.951 2.138 2.158 2.146 2.051 2.242 2.261 2.138 ns
Stratix III Device Handbook, Volume 2
© July 2010 Altera Corporation
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