AK4492ECB Datasheet, PDF (97/101 Pages) Asahi Kasei Microsystems – Quality Oriented 32-Bit 2ch DAC

[AK4492]
4. Connection Example with the AK8157A
The AK8157A is the multi clock generater for the audio product with low RMS gitter. MCLK, BCLK and
LRCK are generated by the AK8157A. Connection example of the AK4492 and the external device is as
follows.
e.g. AK8157: Master / External DSP: Slave
MCLK, BCLK and LRCK are generated by the AK8157A.
SDATA for the AK4492 is output from the external DSP in synchronization with BCLK and LRCK.
System rayout should be designed so that a noise interference between VSS and DVSS does not occure.
9.6MHz
DSP
BICK
SDATA
LRCK
MCLK
Micro-
Controller
0.1F
0.1F
0.1F
0.1F
AK8157
BICK
LRCK
MCLK
CLKIN
SDA
VDD1
VSS1
VDD2 _RSTN
SCL
CAD1
CAD0
VDD3
VSS2
VDD4
VSS3
VSS
0V
AVDD
1.8V
0.1F
0.1F
51ohm
0.1F
DVSS
DVDD
0V _1F 1.8V
AK4492
BICK/BCK/DCLK(J1)
SDATA/DINL/DSDL(H1)
LRCK/DINR/DSDR(G1)
SMUTE/CSN(F1)
SLOW/CDTI/SDA(E1)
DIF0/DZFL(D1)
DIF1/DZFR(C1)
DEM0/DSDL(B1)
DVSS(K2)
TVDD(J2)
PDN(H2)
SSLOW/WCK(G2)
TDMO(F2)
SD/CCLK/SCL(E2)
DIF2/CAD0(D2)
HLOAD/I2C(C2)
GAIN/DSDR(B2)
ACKS/CAD1(A2)
DVDD(K3)
MCLK(J3)
LDOE(H3)
PSN(D3)
TDM1(B3)
TDM0/DCLK(A3)
AVDD(K4)
AVSS(J4)
DCHAIN(B4)
INVR(A4)
TESTE(B5)
VREFHR(A5,A6)
VREFLR(A7,A8)
VCMR(B8)
External
Regulator Circuit
1F
AOUTRN(A9)
AOUTRP(B9)
VDDR(C9,C10,D9)
VSSR(D10,E9,E10)
External
LPF
Circuit
1F
VSSL(F9,F10,G10)
VDDL(G9,H9,H10)
AOUTLP(J9)
AOUTLN(K9)
1F
External
LPF
Circuit
VCML(J8)
VREFLL(L7,K8)
VREFHL(K5,K6)
1F
External
Regulator Circuit
EXTR(J5)
33kohm
VSS
0V
Power Supply
6V
AOUTR
AOUTL
VDD
5V
DVSS VSS
Figure 75. Circuit Example with AK8157A
016011073-E-00
- 97 -
2016/12