AK4492ECB Datasheet, PDF (12/101 Pages) Asahi Kasei Microsystems – Quality Oriented 32-Bit 2ch DAC

[AK4492]
8. Electrical Characteristics
■ Analog Characteristics
■ PCM Mode
(Ta = 25 C; LDOE pin = “L”, AVDD = TVDD = DVDD = 1.8 V, AVSS = DVSS = VSSL/R = 0 V; VREFHL/R
= VDDL/R = 5.0 V, VREFLL/R= 0V; Input data = 24 bit; BICK = 64 fs; Signal Frequency = 1 kHz; Sampling
Frequency = 44.1 kHz; Measurement bandwidth = 20 Hz ~ 20 kHz; 2 Vrms output mode (GC[2:0] bits =
“000” or GAIN pin = “L”); Heavy load drive mode = off(HLOAD bit = “0” or HLOAD pin = “L”); unless
otherwise specified.)
Parameter
Resolution
Dynamic Characteristics (Note 11)
Min.
-
Typ.
-
Max.
Unit
32
Bit
THD+N fs=44.1kHz
GC[2:0]= “000”
or GAIN=“L”
-
BW=20kHz ^0dBFS _{GC[2:0]=“100”}
or GAIN=“H”
-
-115
-111
-
dB
-
dB
60dBFS
-
-61
fs=96kHz
BW=40kHz
0dBFS
60dBFS
-
-111
-
-57
fs=192kHz
BW=40kHz
0dBFS
60dBFS
-
-111
-
-57
BW=80kHz 60dBFS
-
-52
Dynamic Range (60dBFS with A-weighted) _{(Note 12)}
-
-
123
127
S/N (A-weighted) GC[2:0]= “000”
-
123
or GAIN=“L”
(Note 12)
-
127
GC[2:0]= “100”
-
125
or GAIN=“H”
(Note 12)
-
129
Interchannel Isolation (1kHz)
110
120
DC Accuracy (Note 13)
-
dB
-
dB
-
dB
-
dB
-
dB
-
dB
-
dB
-
dB
-
dB
-
dB
-
dB
-
dB
-
dB
Interchannel Gain Mismatch
Gain Drift
Output Voltage GC[2:0]=“000” or GAIN pin=“L” (Note 14)
GC[2:0]=“100” or GAIN pin=“H” (Note 15)
Load
HLOAD=“0” or HLOAD pin=“L”
Resistance
(Note 16)
HLOAD=“1” or HLOAD pin=“H”
Load Capacitance
(Note 17)
-
-
2.65
3.55
400
300
-
0.15
20
2.8
3.75
-
-
-
0.3
-
2.95
3.95
-
-
25
dB
ppm/C
Vpp
Vpp


pF
Note 11. Measured by Audio Precision APx555. Averaging mode.
Note 12. The value of as IC single AK4492. It is a calculated value to remove the noise of External Circuit
Figure 74 and the measuring instrument.
Note 13. The value of as IC single AK4492.
Note 14. The analog output voltage with 0dBFS input signal when GC[2:0] bits = “000” or the GAIN pin =
“L” is calculated by the following formula.
AOUTL/R (typ.@0dB) = (AOUT+)  (AOUT) = 2.8Vpp  (VREFHL/R  VREFLL/R)/5.
Note 15. The analog output voltage with 0dBFS input signal when GC[2:0] bits = “100” or the GAIN pin =
“H” is calculated by the following formula.
AOUTL/R (typ.@0dB) = (AOUT+)  (AOUT) = 3.75Vpp  (VREFHL/R  VREFLL/R)/5.
Note 16. The load resistance value with respect to ground. 10.3 System Design Analog Output shows the
circuits and the calculataion example.
Note 17. The load capacitance value with respect to ground. Analog characteristics are sensitive to
capacitive load that is connected to the output pin. Therefore the capacitive load must be
minimized.
Note 18. It is recommended to use a resistor with 0.1% absolute error for the output stage of the adding
circuit.
016011073-E-00
- 12 -
2016/12