AK7712A-VT Datasheet, PDF (82/87 Pages) Asahi Kasei Microsystems – Built-in 20-bit ADC/DAC Sophisticated Audio DSP

ASAHI KASEI
„ Periphery Circuit
[AK7712A-VT]
1. Ground and Power Supply
In AK7712A, to keep the coupling of digital noise in minimum, AVDD and DVDD are done the decoupling
independently.AVDD,AVB and DVB are supplied with analog power supply of system. AVB and DVB are connected
each other by IC-substrate, and have a resistance of several ohms. If AVDD, AVB, DVB and DVDD are supplied by
another power supply, AVDD,AVB and DVB must be powered at the same time as DVDD ,or AVDD,AVB,DVB must
be powered at first. In the general way, separate both of power supply and ground between analog and digital, and
connect near power supply on PC board. The decoupling capacitor, especially ceramic capacitor of small capacity
must be connected near AK7712A.
Caution: Keep AVDD,AVB,DVB ≥ DVDD-0.3V, or the over current causes latch-up and this IC may fall into destruction.
2. Standard Voltage
The difference of input voltage between VRADH pin and VRADL pin decide the full-scale of analog input, and the
difference of voltage between VRDAH pin and VRDAL pin decide the full-scale of analog output. Usually connect
VRADH with AVDD1, and VRDAH with AVDD2, and connect the ceramic capacitor of 0.1uF between AVSS1 and
AVSS2. VCOM is used as the common voltage of analog signal. Connect electrolytic capacitor about 10µF and the
ceramic capacitor of 0.1uF in parallel between this pin and AVSS to remove high-frequency noise. Especially, the
ceramic capacitor must be connected to the pin as near as possible. Do not get current from VCOM pin. Digital
signal, especially the clock must be parted as far as possible from VRADH,VRADL,VRDAH,VRDAL and VCOM pin
to avoid the coupling to AK7712A.
3. Analog Input
Analog input signal is input to modulator from differential input pin of each channel. The input voltage is differential of
AIN+ and AIN- (∆VAIN=(AIN+)-(AIN-)), and the input range is
± FS=± (VRADH-VRADL) × 0.4 .
When VRADH=5V and VRADL=0V, the input range is ±2.0V. The code of output code format is 2's complement. The
output code against the input voltage is shown in Table 2.
input voltage
>(+FS-1.5LSB)
-0.5LSB
<(-FS+0.5LSB)
output code (sexadecimal digit)
16-bit
20-bit
7FFF
3FFFF
0000
00000
FFFF
7FFFF
8000
80000
Table 2. input voltage vs. output code
At fs=48kHz, AK7712A does sampling the analog input with 3.072MHz. The digital filter removes noise between
30kHz and 3.042MHz. But near 3.072MHz, noise is not removed. Since almost all audio signal does not have
noise near 3.072MHz, so the noise can be reduced enough by simple RC filter.
The standard voltage of A/D conversion is input to VRADH pin and VRADL pin. Usually VRADH is connected with
AVDD1 and VRADL is connected with AVSS1. To remove high-frequency noise, connect 10uF electrolytic capacitor
and 0.1uF ceramic capacitor in parallel between VRADH pin and VRADL pin.
Since the analog power supply voltage of AK7712A is set to +5V, do not input the voltage more than (AVDD1)+0.3V
or the voltage less than (AVSS1)-0.3V or the current more than 10mA to analog input pin(AINL,AINR). The over
current causes destruction of inner protective circuit, moreover latch-up, and the IC falls into destruction.
0180-E-02
- 82 -
1997/12