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AK7712A-VT Datasheet, PDF (68/87 Pages) Asahi Kasei Microsystems – Built-in 20-bit ADC/DAC Sophisticated Audio DSP
ASAHI KASEI
[AK7712A-VT]
3) Writing Offset RAM
The writing to program RAM is executed with 4bytes/set at reset. If all the data is transferred, WRDY pin becomes
"L", and if the writing to OFFRAM is finished, it becomes "H" and next data becomes be able to be input.
In case of writing data with the continuos address, input the data directly. If it's discontinuous, set WRQ pin "H"→"L",
and input in the order of command code, address and data.
<Data Transfer Procedure>
{1 command code
{2 address
{3 data
{4 data
(1 0 0 1 0 0 0 0)
(0 A6 • • • • • • A0)
(D15 • • • • • • D8)
(D7 • • • • • • D0)
4) Preparation of Rewriting Coefficient•Offset RAM(RUN State) and Rewriting
This is used to rewrite the coefficient•offset RAM when program is running. After input of command code, the data,
which is wanted to rewrite with the continuos address, can be able to input up to 16. Secondary, if the write
command code and first address for rewrite are input then contents of RAM is rewritten every appointment of the
rewritten RAM address. For example, when 5 data are rewritten by address"10" of coefficient RAM, it's executed as
follows.
coefficient RAM execution address
rewrite execution position
7 8 9 10 11 13 16 11 12 13 14 15
↓↓
↓↓↓
{ {↑
{{{
address"13" is not rewritten until address"12" is rewr itten.
<Data Transfer Procedure>
* Rewrite preparation
{1 command code
{2 data
{3 data
(1 0 0 0 1 0 0 0)
(D15 • • • • • • D8)
(D7 • • • • • • D0)
* Rewrite
{1 command code:CRAM
(1 0 1 0 0 1 0 0)
{2 first address
:OFRAM
(1 0 0 1 0 1 0 0)
(A7 • • • • • • A0)
0180-E-02
- 68 -
1997/12