AK7712A-VT Datasheet, PDF (5/87 Pages) Asahi Kasei Microsystems – Built-in 20-bit ADC/DAC Sophisticated Audio DSP

ASAHI KASEI
„ AK7712A DSP unit Block Diagram
CP0,1
DP0,1
Data
D0a7
Address
AD0a16
[AK7712A-VT]
CRAM
256 × 16
DRAM
128 × 24
CBUS (16-bit)
DBUS (24-bit)
Delay Data
16-bit
Ext RAM OFRAM
Control 40 × 16
MPX16
MPX24
X
Y
Multiply
16 × 24→40
24-bit
40-bit
Micom I/F
Control
D
PRAM
E
C
384 × 32
Microcomputer Serial
Interface
PC
Stack:1Level
34-bit
MUL DBUS
SHIFT
34-bit
A
B
ALU
34-bit
Overflow Margin:4bit
DR0a3
24-bit
TMP 8 × 24-bit
2 × 24/16-bit
2 × 20/16-bit
2 × 24/16-bit
2 × 20/16-bit
SDIN1 (24/16-bit)
MSB/LSB justified Serial In
SDIN2 (20/16-bit)
MSB justified Serial In (note 1)
SDOUT1 (24/16-bit)
MSB/LSB justified Serial Out
SDOUT2 (20/16-bit)
MSB justified Serial Out (note 2)
Overflow Data
Generator
2 × 20/16-bi
SDOUT3 (20/16-bit)
MSB justified Serial Out (note 3)
Division
16 ÷ 16→16
note 1: Normally it's connected to built-in ADC
2: Normally it's connected to built-in DAC1
Peak Detector
3: Normally it's connected to built-in DAC2
0180-E-02
-5-
1997/12