AK7712A-VT Datasheet, PDF (16/87 Pages) Asahi Kasei Microsystems – Built-in 20-bit ADC/DAC Sophisticated Audio DSP

ASAHI KASEI
[AK7712A-VT]
Switching Characteristics
•_Clock
(Ta=25°C; VA,VD,VB=5.0V±5%; CL=20pF)
Parameter
Control clock frequency
Master clock
Quartz oscillator mode
256fs:
384fs:
512fs:
External clock mode
Duty cycle
256fs:
Pulse width Low
Pulse width High
384fs:
Pulse width Low
Pulse width High
512fs:
Pulse width Low
Pulse width High
Audio serial data clock (BCLK)
Channel select clock (LRCK)
Duty cycle
Microcomputer serial data clock (SCLK
Pulse width Low
Pulse width High
Reset timing
PD pulse width
RST pulse width
Clock falling time
[XTI, BICK, LRCK, SCLK]
(note)
Clock rising time
[XTI, BICK, LRCK, SCLK]
(note)
note : At input of external CMOS clock for XTI.
Symbol
min
fCLK
fCLK
fCLK
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
fCLK
tCLKL
tCLKH
fBLK
fS
fSLK
tSLKL
tSLKH
tPD
tRST
tf
tr
8.192
12.288
12.288
40
8.192
30
30
12.288
20
20
12.288
20
20
1.024
32
49
30
30
typ
max
Units
11.2896
16.9344
16.384
12.288
18.432
18.432
MHz
MHz
MHz
50
11.2986
60
12.288
16.9344 18.432
16.384 18.432
2.8224
44.1
50
3.072
48
51
12.288
%
MHz
ns
ns
MHz
ns
ns
MHz
ns
ns
MHz
kHz
%
MHz
ns
ns
100
ns
100
ns
10
ns
10
ns
0180-E-02
- 16 -
1997/12