AK7712A-VT Datasheet, PDF (69/87 Pages) Asahi Kasei Microsystems – Built-in 20-bit ADC/DAC Sophisticated Audio DSP

ASAHI KASEI
[AK7712A-VT]
5) Writing Code for External Conditional Jump
The writing code for external conditional jump is executed with 2byte/set. It is able to input at both of reset run, and
the input data is set to register at rising of LRCK. When all the data is transferred, WRDY becomes "L", and if the
writing is finished, it becomes "H". The external conditional code is 8-bit, and if any one or more of bits of this code is
coincident with "1" of each code of IFCON field, the jump command is executed. When the data is written at reset
state, it can be executed only after all the data transferred or before cancel. Please set WRQ to "H" after 150nsec or
more after rising of LRCK after cancellation of reset at write on reset state.
< Data Transfer Procedure>
{¹ command code
{² code data
(1 1 0 0 0 1 0 0)
(D7 ^{• • • • •} D0)
6) Writing Control Register
The writing control register(at reset) is executed with 4bytes/set. When all the data is transferred, WRDY becomes
"H", and if the writing is finished, it becomes "H".
<Data Transfer Procedure>
{¹ command code
{² control data
{³ controla data
{⁴ control data
(0 0 0 0 0 1 1 0)
(C23 ^{• • • • • •} C16)
(C15 ^{• • • • • •} C8)
(C7 ^{• • • • • •} C0)
The register, which is controlling the action mode of this LSI, is consists of 24 bits.
The function of each bit is shown in Table 1 as follows.
0180-E-02
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1997/12