AK5701_07 Datasheet, PDF (63/64 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo ADC with PLL & MIC-AMP

[AK5701]
REVISION HISTORY
Date (YY/MM/DD) Revision Reason
Page
05/08/04
00
First Edition
05/11/22
01
Error correction 8
25
35
57
07/08/30
02
Product
Addition
1, 3, 5,
62
Spec Addition 11
Error Correction 30
31
Spec Addition 40
Contents
Switching Characteristics (PLL Slave Mode)
tBCKL(min): 240ns Æ 0.4 x tBCK
tBCKH(min): 240ns Æ 0.4 x tBCK
PLL Slave Mode
a) Mode 1: EXBCLK or EXLRCK Æ MCKI
b) Mode 2: MCKI Æ EXBCLK or EXLRCK
ALC Operation
The sentence of “The IVL and IVR are then set to
the same value for both channels.” was deleted.
Control Sequence (MIC Recording)
Figure 51 (7) Data=01H Æ 04H
(2) 72H&73H Æ 12H&13H
(3) 7AH Æ 1AH
(4) 7BH Æ 1BH
(5) 7CH Æ 1CH
AK5701KN was added.
(1) Ambient Temperature
AK5701VN : −30 ∼ +85°C
AK5701KN : −40 ∼ +85°C
(2) Marking
AK5701VN : “5701”
AK5701KN : “5701K”
1. Control Interface Timing(CSP pin = “L”)
(1) CSN “↓” to CCLK “↑”
→ CSN Edge to CCLK “↑”
(2) CCLK “↑” to CSN “↑”
→ CCLK “↑” to CSN Edge
2. Control Interface Timing(CSP pin = “H”)
(1) CSN “↑” to CCLK “↑”
→ CSN Edge to CCLK “↑”
(2) CCLK “↑” to CSN “↓”
→ CCLK “↑” to CSN Edge
3. Note 22 was added.
Figure 26 ∼ Figure 29 :
ECTBCLK(32fs)/BCLK(32fs)
No of 1^st bit in Fugure 15 → 31
Figure 30 ∼ Figure 33 : BCLK(64fs)
No of 1^st bit in Fugure : 15 → 31
Serial Control I/F
1. CSP pin = “L”
“CSN should be set to “H” once after 16 CCLKs
for each address.” was added.
2. CSP pin = “H”
“CSN should be set to “L” once after 16 CCLKs for
each address.” was added.
MS0404-E-02
- 63 -
2007/08