AK5701_07 Datasheet, PDF (14/64 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo ADC with PLL & MIC-AMP

[AK5701]
1/fs
EXLRCK
tLRCKH
tBCK
VIH
VIL
tBLR
VIH
EXBCLK
(BCKP = "0")
VIL
tBCKH
tBCKL
VIH
EXBCLK
(BCKP = "1")
VIL
Figure 6. Clock Timing (PLL Slave mode; PLL Reference Clock = EXLRCK or EXBCLK pin & DSP mode; MSBS = 0)
EXLRCK
EXBCLK
(BCKP = "1")
EXBCLK
(BCKP = "0")
1/fs
tLRCKH
tBCK
tBCKH
tBCKL
tBLR
VIH
VIL
VIH
VIL
VIH
VIL
Figure 7. Clock Timing (PLL Slave mode; PLL Reference Clock = EXLRCK or EXBCLK pin & DSP mode; MSBS = 1)
MS0404-E-02
- 14 -
2007/08