AK5701_07 Datasheet, PDF (45/64 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo ADC with PLL & MIC-AMP

[AK5701]
Addr Register Name
1AH Timer Select
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
ZTM1 ZTM0 WTM1 WTM0
0
0
0
0
0
0
0
0
WTM1-0: ALC Recovery Waiting Period (Table 25)
Default: “00” (128/fs)
ZTM1-0: ALC Limiter/Recovery Operation Zero Crossing Timeout Period (Table 24)
Default: “00” (128/fs)
Addr
1BH
Register Name
ALC Mode Control 1
Default
D7
REF7
1
D6
REF6
1
D5
REF5
1
D4
REF4
0
D3
REF3
0
D2
REF2
0
REF7-0: Reference Value at ALC Recovery Operation. 0.375dB step, 242 Level (Table 27)
Default: “E1H” (+30.0dB)
D1
REF1
0
D0
REF0
1
Addr
1CH
Register Name
ALC Mode Control 2
Default
D7
ALC
0
D6
ZELMN
0
D5
LMAT1
0
D4
LMAT0
0
D3
RGAIN1
0
D2
RGAIN0
0
D1
LMTH1
0
D0
LMTH0
0
LMTH1-0: ALC Limiter Detection Level / Recovery Counter Reset Level (Table 22)
Default: “00”
RGAIN1-0: ALC Recovery GAIN Step (Table 26)
Default: “00”
LMAT1-0: ALC Limiter ATT Step (Table 23)
Default: “00”
ZELMN: Zero Crossing Detection Enable at ALC Limiter Operation
0: Enable (default)
1: Disable
ALC: ALC Enable
0: ALC Disable (default)
1: ALC Enable
MS0404-E-02
- 45 -
2007/08