AK5701_07 Datasheet, PDF (49/64 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo ADC with PLL & MIC-AMP

[AK5701]
1. Grounding and Power Supply Decoupling
The AK5701 requires careful attention to power supply and grounding arrangements. AVDD and DVDD are usually
supplied from the system’s analog supply. If AVDD and DVDD are supplied separately, the power-up sequence is not
critical. AVSS and DVSS of the AK5701 should be connected to the analog ground plane. System analog ground and
digital ground should be connected together near to where the supplies are brought onto the printed circuit board.
Decoupling capacitors should be as near to the AK5701 as possible, with the small value ceramic capacitor being the
nearest.
2. Voltage Reference
VCOM is a signal ground of this chip. A 2.2μF electrolytic capacitor in parallel with a 0.1μF ceramic capacitor attached
to the VCOM pin eliminates the effects of high frequency noise. No load current may be drawn from the VCOM pin. All
signals, especially clocks, should be kept away from the VCOM pin in order to avoid unwanted coupling into the
AK5701.
3. Analog Inputs
The analog inputs are single-ended or full-differential and input resistance is 60kΩ (typ)@MGAIN1-0 bits = “00”, 30kΩ
(typ)@MGAIN1-0 bits = “01” or “10”. The input signal range scales with 0.6 x AVDD Vpp(typ)@MGAIN 1-0 bits =
“00” centered around the internal common voltage (0.5 x AVDD). Usually the input signal is AC coupled using a
capacitor. The cut-off frequency is fc = 1/(2πRC). The ADC output data format is 2’s complement. The DC offset
including the ADC’s own DC offset is removed by the internal HPF (fc=3.4Hz@ HPF1-0 bits = “00”, fs=44.1kHz). The
AK5701 can accept input voltages from AVSS to AVDD at single-ended.
MS0404-E-02
- 49 -
2007/08