AK5701_07 Datasheet, PDF (30/64 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo ADC with PLL & MIC-AMP

[AK5701]
EXLRCK
LRCK
15
EXBCLK(32fs)
BCLK(32fs)
SDTO(o)
0 1 2 8 14 15 16 17 18 29 30 31 0 1 2 8 14 15 16 17 18 13 30 31
Lch
Rch
15 14 ⁸ 2 1 0 15 14
Lch
Rch
2 1 0 15 14 ⁸ 2 1 0 15 14
2 10
1/fs
1/fs
15:MSB, 0:LSB
Figure 26. Mode 0 Timing (BCKP = “0”, MSBS = “0”, M/S = “0” or “1”)
EXLRCK
LRCK
15
EXBCLK(32fs)
BCLK(32fs)
SDTO(o)
0 1 2 8 14 15 16 17 18 29 30 31 0 1 2 8 14 15 16 17 18 13 30 31
Lch
Rch
15 14 ⁸ 2 1 0 15 14
Lch
Rch
2 1 0 15 14 ⁸ 2 1 0 15 14
1/fs
1/fs
15:MSB, 0:LSB
Figure 27. Mode 0 Timing (BCKP = “1”, MSBS = “0”, M/S = “0” or “1”)
2 10
EXLRCK
LRCK
15
EXBCLK(32fs)
BCLK(32fs)
SDTO(o)
0 1 2 8 14 15 16 17 18 29 30 31 0 1 2 8 14 15 16 17 18 13 30 31
Lch
Rch
15 14 ⁸ 2 1 0 15 14
Lch
Rch
2 1 0 15 14 ⁸ 2 1 0 15 14
2 10
1/fs
1/fs
15:MSB, 0:LSB
Figure 28. Mode 0 Timing (BCKP = “0”, MSBS = “1”, M/S = “0” or “1”)
EXLRCK
LRCK
15
EXBCLK(32fs)
BCLK(32fs)
SDTO(o)
0 1 2 8 14 15 16 17 18 29 30 31 0 1 2 8 14 15 16 17 18 13 30 31
Lch
Rch
15 14 ⁸ 2 1 0 15 14
Lch
Rch
2 1 0 15 14 ⁸ 2 1 0 15 14
2 10
1/fs
1/fs
15:MSB, 0:LSB
Figure 29. Mode 0 Timing (BCKP = “1”, MSBS = “1”, M/S = “0” or “1”)
MS0404-E-02
- 30 -
2007/08