AK5701_07 Datasheet, PDF (48/64 Pages) Asahi Kasei Microsystems – 16-Bit ΔΣ Stereo ADC with PLL & MIC-AMP

[AK5701]
μP
19 MPWR
EXLRCK 12
DSP
Line In
20 RIN2
21 LIN2
22 RIN1
AK5701
Top View
EXSDTI 11
MCKO 10
CSP 9
23 LIN1
SDTO 8
DSP
0.1 x Cp
(Note)
24 VCOC
Rp
Cp
LRCK 7
Power Supply
2.4 ∼ 3.6V
Power Supply
1.6 ∼ 3.6V
Analog Ground
Digital Ground
Notes:
- AVSS and DVSS of the AK5701 should be distributed separately from the ground of external controllers.
- All digital input pins should not be left floating.
- When the AK5701 is EXT mode (PMPLL bit = “0”), a resistor and capacitor of the VCOC pin is not needed.
- When the AK5701 is PLL mode (PMPLL bit = “1”), a resistor and capacitor of the VCOC pin is shown in Table
4. 0.1 x Cp in parallel with Cp+Rp improves PLL jitter characteristics.
Figure 44. Typical Connection Diagram (Line Input)
MS0404-E-02
- 48 -
2007/08