Z86D73 Datasheet, PDF (85/92 Pages) Zilog, Inc. – 40/44/48-Pin Low-Voltage IR OTP

Z86D73
40/44/48-Pin Low-Voltage IR OTP
79
R250 IRQ
D7 D6 D5 D4 D3 D2 D1 D0
IRQ0 = P32 Input
IRQ1 = P33 Input
IRQ2 = P31 Input
IRQ3 = T16
IRQ4 = T8
IRQ5 = LVD
Inter Edge
P31↓ P32↓ = 00
P31↓ P32↑ = 01
P31↑ P32↓ = 10
P31↑↓ P32↑↓ = 11
Figure 52. Interrupt Request Register (FAh: Read/Write)
R251 IMR
D7 D6 D5 D4 D3 D2 D1 D0
1 Enables IRQ5–IRQ0
(D0 = IRQ0)
Reserved (Must be 0)
0 Master Interrupt Disable *
1 Master Interrupt Enable * *
* Default setting after reset
* * Only by using E1, D1 instruction; D1 is required before changing the IMR register
Figure 53. Interrupt Mask Register (FBh: Read/Write)
PS019402-1103
PRELIMINARY