Z86D73 Datasheet, PDF (36/92 Pages) Zilog, Inc. – 40/44/48-Pin Low-Voltage IR OTP

Z86D73
40/44/48-Pin Low-Voltage IR OTP
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The upper nibble of the register pointer (see Figure 17) selects which working reg-
ister group, of 16 bytes in the register file, is accessed out of the possible 256. The
lower nibble selects the expanded register file bank and, in the case of the
Z86D73 family, banks 0, F, and D are implemented. A 0h in the lower nibble allows
the normal register file (bank 0) to be addressed. Any other value from 1h to Fh
exchanges the lower 16 registers to an expanded register bank.
R253 RP
D7 D6 D5 D4 D3 D2 D1 D0
Default Setting After Reset = 0000 0000
Expanded Register
File Pointer
Working Register
Pointer
Figure 17. Register Pointer
Example: Z86D73: (See Figure 16 on page 29)
R253 RP = 00h
R0 = Port 0
R1 = Port 1
R2 = Port 2
R3 = Port 3
But if:
R253 RP = 0Dh
R0 = CTRL0
R1 = CTRL1
R2 = CTRL2
R3 = Reserved
The counter/timers are mapped into ERF group D. Access is easily performed
using the following:
LD RP, #0Dh
LD R0,#xx
LD 1, #xx
LD R1, 2
; Select ERF D for access to bank D
; (working register group 0)
; load CTRL0
; load CTRL1
; CTRL2→CTRL1
PS019402-1103
PRELIMINARY