Z86D73 Datasheet, PDF (56/92 Pages) Zilog, Inc. – 40/44/48-Pin Low-Voltage IR OTP

Z86D73
40/44/48-Pin Low-Voltage IR OTP
50
Caution:
Do not load these registers at the time the values are to be
loaded into the counter/timer to ensure known operation.
An initial count of 1 is not allowed. An initial count of 0
causes T16 to count from 0 to FFFFh to FFFEh. Transition
from 0 to FFFFh is not a timeout condition.
TC16H*256+TC16L Counts
“Counter Enable” Command
T16_OUT Switches to Its
Initial Value (CTR1 D0)
T16_OUT Toggles,
Timeout Interrupt
Figure 27. T16_OUT in Single-Pass Mode
TC16_OUT
TC16H*256+TC16L
TC16H*256+TC16
TC16H*256+TC16L
...
“Counter Enable” Command,
T16_OUT Switches to Its
Initial Value (CTR1 D0)
T16_OUT Toggles,
Timeout Interrupt
Figure 28. T16_OUT in Modulo-N Mode
T16_OUT Toggles,
Timeout Interrupt
T16 Demodulation Mode
Program TC16L and TC16H to FFh. After T16 is enabled, and the first edge (ris-
ing, falling, or both depending on CTR1 D5; D4) is detected, T16 captures HI16
and LO16, reloads, and begins counting.
If D6 of CTR2 Is 0
When a subsequent edge (rising, falling, or both depending on CTR1, D5; D4) is
detected during counting, the current count in T16 is complemented and put into
HI16 and LO16. When data is captured, one of the edge detect status bits (CTR1,
D1; D0) is set, and an interrupt is generated if enabled (CTR2, D2). T16 is loaded
with FFFFh and starts again.
PS019402-1103
PRELIMINARY