Z86D73 Datasheet, PDF (26/92 Pages) Zilog, Inc. – 40/44/48-Pin Low-Voltage IR OTP

Z86D73
40/44/48-Pin Low-Voltage IR OTP
20
An optional pull-up transistor is available as a mask option on all Port 0 bits with
nibble select.
Note: Internal pull-ups are disabled on any given pin or group of port
pins when programmed into output mode.
4
Z86D73
4
OTP
Port 0 (I/O or A15–A8)
Open-Drain
I/O
Out
In
Mask ^VCC
Option
Resistive
transistor
pull-up
Pad
In
0.4 V_DD
Trip Point Buffer
(P00 to P03 only)
Figure 10. Port 0 Configuration
*Mask Selectable
PS019402-1103
PRELIMINARY