Z86D73 Datasheet, PDF (5/92 Pages) Zilog, Inc. – 40/44/48-Pin Low-Voltage IR OTP

Z86D73
40/44/48-Pin Low-Voltage IR OTP
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Figure 35. SCLK Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 36. Stop-Mode Recovery Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Figure 37. Stop-Mode Recovery Register 2 ((0F) DH:D2–D4,
D6 Write Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Figure 38. Watch-Dog Timer Mode Register (Write Only) . . . . . . . . . . . . . . . . 64
Figure 39. Resets and WDT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Figure 40. TC8 Control Register ((0D) OH: Read/Write
Except Where Noted) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 41. T8 and T16 Common Control Functions ((0D) 1h: Read/Write) . . . 69
Figure 42. T16 Control Register ((0D) 2h: Read/Write
Except Where Noted) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Figure 43. Low-Voltage Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Figure 44. Stop-Mode Recovery Register ((0F) 0Bh: D6–D0=Write Only,
D7=Read Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Figure 45. Stop-Mode Recovery Register 2 ((0F) 0Dh:D2–D4,
D6 Write Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Figure 46. Watch-Dog Timer Register ((0F) 0Fh: Write Only) . . . . . . . . . . . . . 74
Figure 47. Port Configuration Register (PCON) ((0F) 0h: Write Only) . . . . . . . 75
Figure 48. Port 2 Mode Register (F6h: Write Only) . . . . . . . . . . . . . . . . . . . . . 75
Figure 49. Port 3 Mode Register (F7h: Write Only) . . . . . . . . . . . . . . . . . . . . . 76
Figure 50. Port 0 and 1 Mode Register (F8h: Write Only) . . . . . . . . . . . . . . . . 77
Figure 51. Interrupt Priority Register (F9h: Write Only) . . . . . . . . . . . . . . . . . . 78
Figure 52. Interrupt Request Register (FAh: Read/Write) . . . . . . . . . . . . . . . . . 79
Figure 53. Interrupt Mask Register (FBh: Read/Write) . . . . . . . . . . . . . . . . . . . 79
Figure 54. Flag Register (FCh: Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Figure 55. Register Pointer (FDh: Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . 80
Figure 56. Stack Pointer High (FEh: Read/Write) . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 57. Stack Pointer Low (FFh: Read/Write) . . . . . . . . . . . . . . . . . . . . . . . 81
Figure 58. 40-Pin DIP Package Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 59. 44-Pin PLCC Package Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Figure 60. 44-Pin QFP Package Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Figure 61. 48-Pin SSOP Package Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
PS019402-1103
PRELIMINARY