Z86D73 Datasheet, PDF (47/92 Pages) Zilog, Inc. – 40/44/48-Pin Low-Voltage IR OTP

Z86D73
40/44/48-Pin Low-Voltage IR OTP
41
Counter_INT_Mask
Set this bit to allow an interrupt when T16 times out.
P35_Out
This bit defines whether P35 is used as a normal output pin or T16 output.
SMR2 Stop-Mode Recovery Register 2
Table 14 lists and briefly describes the fields for this register.
Table 14. SMR2(F)0Dh: Stop-Mode Recovery Register 2*
Field
Bit Position
Value
Description
Reserved
Recovery Level
7-------
-6------
0
W 0^†
1
Reserved (Must be 0)
Low
High
Reserved
Source
--5-----
---432--
0
W 000^†
001
010
011
100
101
110
111
Reserved (Must be 0)
A. POR Only
B. NAND of P23–P20
C. NAND of P27–P20
D. NOR of P33–P31
E. NAND of P33–P31
F. NOR of P33–P31, P00, P07
G. NAND of P33–P31, P00, P07
H. NAND of P33–P31, P22–P20
Reserved
------10
00
Reserved (Must be 0)
Notes:
* Port pins configured as outputs are ignored as a SMR recovery source.
† _{Indicates the value upon Power-On Reset}
PS019402-1103
PRELIMINARY